1 /* 2 * Copyright 2014-2015 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <spl.h> 9 #include <asm/io.h> 10 #include <fsl_ifc.h> 11 #include <i2c.h> 12 13 DECLARE_GLOBAL_DATA_PTR; 14 15 u32 spl_boot_device(void) 16 { 17 #ifdef CONFIG_SPL_MMC_SUPPORT 18 return BOOT_DEVICE_MMC1; 19 #endif 20 #ifdef CONFIG_SPL_NAND_SUPPORT 21 return BOOT_DEVICE_NAND; 22 #endif 23 return 0; 24 } 25 26 u32 spl_boot_mode(const u32 boot_device) 27 { 28 switch (spl_boot_device()) { 29 case BOOT_DEVICE_MMC1: 30 #ifdef CONFIG_SPL_FAT_SUPPORT 31 return MMCSD_MODE_FS; 32 #else 33 return MMCSD_MODE_RAW; 34 #endif 35 case BOOT_DEVICE_NAND: 36 return 0; 37 default: 38 puts("spl: error: unsupported device\n"); 39 hang(); 40 } 41 } 42 43 #ifdef CONFIG_SPL_BUILD 44 45 void spl_board_init(void) 46 { 47 #if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_LSCH2) 48 /* 49 * In case of Secure Boot, the IBR configures the SMMU 50 * to allow only Secure transactions. 51 * SMMU must be reset in bypass mode. 52 * Set the ClientPD bit and Clear the USFCFG Bit 53 */ 54 u32 val; 55 val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); 56 out_le32(SMMU_SCR0, val); 57 val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); 58 out_le32(SMMU_NSCR0, val); 59 #endif 60 } 61 62 void board_init_f(ulong dummy) 63 { 64 /* Clear global data */ 65 memset((void *)gd, 0, sizeof(gd_t)); 66 board_early_init_f(); 67 timer_init(); 68 #ifdef CONFIG_ARCH_LS2080A 69 env_init(); 70 #endif 71 get_clocks(); 72 73 preloader_console_init(); 74 75 #ifdef CONFIG_SPL_I2C_SUPPORT 76 i2c_init_all(); 77 #endif 78 dram_init(); 79 } 80 #endif 81