1 /*
2  * Copyright 2014-2015 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <efi_loader.h>
9 #include <libfdt.h>
10 #include <fdt_support.h>
11 #include <phy.h>
12 #ifdef CONFIG_FSL_LSCH3
13 #include <asm/arch/fdt.h>
14 #endif
15 #ifdef CONFIG_FSL_ESDHC
16 #include <fsl_esdhc.h>
17 #endif
18 #ifdef CONFIG_SYS_DPAA_FMAN
19 #include <fsl_fman.h>
20 #endif
21 #ifdef CONFIG_MP
22 #include <asm/arch/mp.h>
23 #endif
24 #include <fsl_sec.h>
25 #include <asm/arch-fsl-layerscape/soc.h>
26 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
27 #include <asm/armv8/sec_firmware.h>
28 #endif
29 
30 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
31 {
32 	return fdt_setprop_string(blob, offset, "phy-connection-type",
33 					 phy_string_for_interface(phyc));
34 }
35 
36 #ifdef CONFIG_MP
37 void ft_fixup_cpu(void *blob)
38 {
39 	int off;
40 	__maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
41 	fdt32_t *reg;
42 	int addr_cells;
43 	u64 val, core_id;
44 	size_t *boot_code_size = &(__secondary_boot_code_size);
45 	u32 mask = cpu_pos_mask();
46 	int off_prev = -1;
47 
48 	off = fdt_path_offset(blob, "/cpus");
49 	if (off < 0) {
50 		puts("couldn't find /cpus node\n");
51 		return;
52 	}
53 
54 	fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
55 
56 	off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
57 					    "cpu", 4);
58 	while (off != -FDT_ERR_NOTFOUND) {
59 		reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
60 		if (reg) {
61 			core_id = fdt_read_number(reg, addr_cells);
62 			if (!test_bit(id_to_core(core_id), &mask)) {
63 				fdt_del_node(blob, off);
64 				off = off_prev;
65 			}
66 		}
67 		off_prev = off;
68 		off = fdt_node_offset_by_prop_value(blob, off_prev,
69 						    "device_type", "cpu", 4);
70 	}
71 
72 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
73 	defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
74 	int node;
75 	u32 psci_ver;
76 
77 	/* Check the psci version to determine if the psci is supported */
78 	psci_ver = sec_firmware_support_psci_version();
79 	if (psci_ver == 0xffffffff) {
80 		/* remove psci DT node */
81 		node = fdt_path_offset(blob, "/psci");
82 		if (node >= 0)
83 			goto remove_psci_node;
84 
85 		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
86 		if (node >= 0)
87 			goto remove_psci_node;
88 
89 		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
90 		if (node >= 0)
91 			goto remove_psci_node;
92 
93 		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
94 		if (node >= 0)
95 			goto remove_psci_node;
96 
97 remove_psci_node:
98 		if (node >= 0)
99 			fdt_del_node(blob, node);
100 	} else {
101 		return;
102 	}
103 #endif
104 	off = fdt_path_offset(blob, "/cpus");
105 	if (off < 0) {
106 		puts("couldn't find /cpus node\n");
107 		return;
108 	}
109 	fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
110 
111 	off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
112 	while (off != -FDT_ERR_NOTFOUND) {
113 		reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
114 		if (reg) {
115 			core_id = fdt_read_number(reg, addr_cells);
116 			if (core_id  == 0 || (is_core_online(core_id))) {
117 				val = spin_tbl_addr;
118 				val += id_to_core(core_id) *
119 				       SPIN_TABLE_ELEM_SIZE;
120 				val = cpu_to_fdt64(val);
121 				fdt_setprop_string(blob, off, "enable-method",
122 						   "spin-table");
123 				fdt_setprop(blob, off, "cpu-release-addr",
124 					    &val, sizeof(val));
125 			} else {
126 				debug("skipping offline core\n");
127 			}
128 		} else {
129 			puts("Warning: found cpu node without reg property\n");
130 		}
131 		off = fdt_node_offset_by_prop_value(blob, off, "device_type",
132 						    "cpu", 4);
133 	}
134 
135 	fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
136 			*boot_code_size);
137 #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
138 	efi_add_memory_map((uintptr_t)&secondary_boot_code,
139 			   ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
140 			   EFI_RESERVED_MEMORY_TYPE, false);
141 #endif
142 }
143 #endif
144 
145 void fsl_fdt_disable_usb(void *blob)
146 {
147 	int off;
148 	/*
149 	 * SYSCLK is used as a reference clock for USB. When the USB
150 	 * controller is used, SYSCLK must meet the additional requirement
151 	 * of 100 MHz.
152 	 */
153 	if (CONFIG_SYS_CLK_FREQ != 100000000) {
154 		off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
155 		while (off != -FDT_ERR_NOTFOUND) {
156 			fdt_status_disabled(blob, off);
157 			off = fdt_node_offset_by_compatible(blob, off,
158 							    "snps,dwc3");
159 		}
160 	}
161 }
162 
163 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
164 static void fdt_fixup_gic(void *blob)
165 {
166 	int offset, err;
167 	u64 reg[8];
168 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
169 	unsigned int val;
170 	struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
171 	int align_64k = 0;
172 
173 	val = gur_in32(&gur->svr);
174 
175 	if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
176 		align_64k = 1;
177 	} else if (SVR_REV(val) != REV1_0) {
178 		val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
179 		if (!val)
180 			align_64k = 1;
181 	}
182 
183 	offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000");
184 	if (offset < 0) {
185 		printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
186 		       "interrupt-controller@1400000", fdt_strerror(offset));
187 		return;
188 	}
189 
190 	/* Fixup gic node align with 64K */
191 	if (align_64k) {
192 		reg[0] = cpu_to_fdt64(GICD_BASE_64K);
193 		reg[1] = cpu_to_fdt64(GICD_SIZE_64K);
194 		reg[2] = cpu_to_fdt64(GICC_BASE_64K);
195 		reg[3] = cpu_to_fdt64(GICC_SIZE_64K);
196 		reg[4] = cpu_to_fdt64(GICH_BASE_64K);
197 		reg[5] = cpu_to_fdt64(GICH_SIZE_64K);
198 		reg[6] = cpu_to_fdt64(GICV_BASE_64K);
199 		reg[7] = cpu_to_fdt64(GICV_SIZE_64K);
200 	} else {
201 	/* Fixup gic node align with default */
202 		reg[0] = cpu_to_fdt64(GICD_BASE);
203 		reg[1] = cpu_to_fdt64(GICD_SIZE);
204 		reg[2] = cpu_to_fdt64(GICC_BASE);
205 		reg[3] = cpu_to_fdt64(GICC_SIZE);
206 		reg[4] = cpu_to_fdt64(GICH_BASE);
207 		reg[5] = cpu_to_fdt64(GICH_SIZE);
208 		reg[6] = cpu_to_fdt64(GICV_BASE);
209 		reg[7] = cpu_to_fdt64(GICV_SIZE);
210 	}
211 
212 	err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg));
213 	if (err < 0) {
214 		printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
215 		       "reg", "interrupt-controller@1400000",
216 		       fdt_strerror(err));
217 		return;
218 	}
219 
220 	return;
221 }
222 #endif
223 
224 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
225 static int _fdt_fixup_msi_node(void *blob, const char *name,
226 				  int irq_0, int irq_1, int rev)
227 {
228 	int err, offset, len;
229 	u32 tmp[4][3];
230 	void *p;
231 
232 	offset = fdt_path_offset(blob, name);
233 	if (offset < 0) {
234 		printf("WARNING: fdt_path_offset can't find path %s: %s\n",
235 		       name, fdt_strerror(offset));
236 		return 0;
237 	}
238 
239 	/*fixup the property of interrupts*/
240 
241 	tmp[0][0] = cpu_to_fdt32(0x0);
242 	tmp[0][1] = cpu_to_fdt32(irq_0);
243 	tmp[0][2] = cpu_to_fdt32(0x4);
244 
245 	if (rev > REV1_0) {
246 		tmp[1][0] = cpu_to_fdt32(0x0);
247 		tmp[1][1] = cpu_to_fdt32(irq_1);
248 		tmp[1][2] = cpu_to_fdt32(0x4);
249 		tmp[2][0] = cpu_to_fdt32(0x0);
250 		tmp[2][1] = cpu_to_fdt32(irq_1 + 1);
251 		tmp[2][2] = cpu_to_fdt32(0x4);
252 		tmp[3][0] = cpu_to_fdt32(0x0);
253 		tmp[3][1] = cpu_to_fdt32(irq_1 + 2);
254 		tmp[3][2] = cpu_to_fdt32(0x4);
255 		len = sizeof(tmp);
256 	} else {
257 		len = sizeof(tmp[0]);
258 	}
259 
260 	err = fdt_setprop(blob, offset, "interrupts", tmp, len);
261 	if (err < 0) {
262 		printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
263 		       "interrupts", name, fdt_strerror(err));
264 		return 0;
265 	}
266 
267 	/*fixup the property of reg*/
268 	p = (char *)fdt_getprop(blob, offset, "reg", &len);
269 	if (!p) {
270 		printf("WARNING: fdt_getprop can't get %s from node %s\n",
271 		       "reg", name);
272 		return 0;
273 	}
274 
275 	memcpy((char *)tmp, p, len);
276 
277 	if (rev > REV1_0)
278 		*((u32 *)tmp + 3) = cpu_to_fdt32(0x1000);
279 	else
280 		*((u32 *)tmp + 3) = cpu_to_fdt32(0x8);
281 
282 	err = fdt_setprop(blob, offset, "reg", tmp, len);
283 	if (err < 0) {
284 		printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
285 		       "reg", name, fdt_strerror(err));
286 		return 0;
287 	}
288 
289 	/*fixup the property of compatible*/
290 	if (rev > REV1_0)
291 		err = fdt_setprop_string(blob, offset, "compatible",
292 					 "fsl,ls1043a-v1.1-msi");
293 	else
294 		err = fdt_setprop_string(blob, offset, "compatible",
295 					 "fsl,ls1043a-msi");
296 	if (err < 0) {
297 		printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
298 		       "compatible", name, fdt_strerror(err));
299 		return 0;
300 	}
301 
302 	return 1;
303 }
304 
305 static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
306 {
307 	int offset, len, err;
308 	void *p;
309 	int val;
310 	u32 tmp[4][8];
311 
312 	offset = fdt_path_offset(blob, name);
313 	if (offset < 0) {
314 		printf("WARNING: fdt_path_offset can't find path %s: %s\n",
315 		       name, fdt_strerror(offset));
316 		return 0;
317 	}
318 
319 	p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
320 	if (!p || len != sizeof(tmp)) {
321 		printf("WARNING: fdt_getprop can't get %s from node %s\n",
322 		       "interrupt-map", name);
323 		return 0;
324 	}
325 
326 	memcpy((char *)tmp, p, len);
327 
328 	val = fdt32_to_cpu(tmp[0][6]);
329 	if (rev > REV1_0) {
330 		tmp[1][6] = cpu_to_fdt32(val + 1);
331 		tmp[2][6] = cpu_to_fdt32(val + 2);
332 		tmp[3][6] = cpu_to_fdt32(val + 3);
333 	} else {
334 		tmp[1][6] = cpu_to_fdt32(val);
335 		tmp[2][6] = cpu_to_fdt32(val);
336 		tmp[3][6] = cpu_to_fdt32(val);
337 	}
338 
339 	err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
340 	if (err < 0) {
341 		printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
342 		       "interrupt-map", name, fdt_strerror(err));
343 		return 0;
344 	}
345 	return 1;
346 }
347 
348 /* Fixup msi node for ls1043a rev1.1*/
349 
350 static void fdt_fixup_msi(void *blob)
351 {
352 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
353 	unsigned int rev;
354 
355 	rev = gur_in32(&gur->svr);
356 
357 	if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
358 		return;
359 
360 	rev = SVR_REV(rev);
361 
362 	_fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000",
363 			    116, 111, rev);
364 	_fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000",
365 			    126, 121, rev);
366 	_fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000",
367 			    160, 155, rev);
368 
369 	_fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev);
370 	_fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev);
371 	_fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev);
372 }
373 #endif
374 
375 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
376 /* Remove JR node used by SEC firmware */
377 void fdt_fixup_remove_jr(void *blob)
378 {
379 	int jr_node, addr_cells, len;
380 	int crypto_node = fdt_path_offset(blob, "crypto");
381 	u64 jr_offset, used_jr;
382 	fdt32_t *reg;
383 
384 	used_jr = sec_firmware_used_jobring_offset();
385 	fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL);
386 
387 	jr_node = fdt_node_offset_by_compatible(blob, crypto_node,
388 						"fsl,sec-v4.0-job-ring");
389 
390 	while (jr_node != -FDT_ERR_NOTFOUND) {
391 		reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len);
392 		jr_offset = fdt_read_number(reg, addr_cells);
393 		if (jr_offset == used_jr) {
394 			fdt_del_node(blob, jr_node);
395 			break;
396 		}
397 		jr_node = fdt_node_offset_by_compatible(blob, jr_node,
398 							"fsl,sec-v4.0-job-ring");
399 	}
400 }
401 #endif
402 
403 void ft_cpu_setup(void *blob, bd_t *bd)
404 {
405 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
406 	unsigned int svr = gur_in32(&gur->svr);
407 
408 	/* delete crypto node if not on an E-processor */
409 	if (!IS_E_PROCESSOR(svr))
410 		fdt_fixup_crypto_node(blob, 0);
411 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
412 	else {
413 		ccsr_sec_t __iomem *sec;
414 
415 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
416 		if (fdt_fixup_kaslr(blob))
417 			fdt_fixup_remove_jr(blob);
418 #endif
419 
420 		sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
421 		fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
422 	}
423 #endif
424 
425 #ifdef CONFIG_MP
426 	ft_fixup_cpu(blob);
427 #endif
428 
429 #ifdef CONFIG_SYS_NS16550
430 	do_fixup_by_compat_u32(blob, "fsl,ns16550",
431 			       "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
432 #endif
433 
434 	do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
435 			     CONFIG_SYS_CLK_FREQ, 1);
436 
437 #ifdef CONFIG_PCI
438 	ft_pci_setup(blob, bd);
439 #endif
440 
441 #ifdef CONFIG_FSL_ESDHC
442 	fdt_fixup_esdhc(blob, bd);
443 #endif
444 
445 #ifdef CONFIG_SYS_DPAA_FMAN
446 	fdt_fixup_fman_firmware(blob);
447 #endif
448 #ifndef CONFIG_ARCH_LS1012A
449 	fsl_fdt_disable_usb(blob);
450 #endif
451 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
452 	fdt_fixup_gic(blob);
453 #endif
454 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
455 	fdt_fixup_msi(blob);
456 #endif
457 }
458