1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2014-2015 Freescale Semiconductor, Inc. 4 */ 5 6 #include <common.h> 7 #include <efi_loader.h> 8 #include <linux/libfdt.h> 9 #include <fdt_support.h> 10 #include <phy.h> 11 #ifdef CONFIG_FSL_LSCH3 12 #include <asm/arch/fdt.h> 13 #endif 14 #ifdef CONFIG_FSL_ESDHC 15 #include <fsl_esdhc.h> 16 #endif 17 #ifdef CONFIG_SYS_DPAA_FMAN 18 #include <fsl_fman.h> 19 #endif 20 #ifdef CONFIG_MP 21 #include <asm/arch/mp.h> 22 #endif 23 #include <fsl_sec.h> 24 #include <asm/arch-fsl-layerscape/soc.h> 25 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT 26 #include <asm/armv8/sec_firmware.h> 27 #endif 28 #include <asm/arch/speed.h> 29 #include <fsl_qbman.h> 30 31 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) 32 { 33 return fdt_setprop_string(blob, offset, "phy-connection-type", 34 phy_string_for_interface(phyc)); 35 } 36 37 #ifdef CONFIG_MP 38 void ft_fixup_cpu(void *blob) 39 { 40 int off; 41 __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr(); 42 fdt32_t *reg; 43 int addr_cells; 44 u64 val, core_id; 45 size_t *boot_code_size = &(__secondary_boot_code_size); 46 u32 mask = cpu_pos_mask(); 47 int off_prev = -1; 48 49 off = fdt_path_offset(blob, "/cpus"); 50 if (off < 0) { 51 puts("couldn't find /cpus node\n"); 52 return; 53 } 54 55 fdt_support_default_count_cells(blob, off, &addr_cells, NULL); 56 57 off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type", 58 "cpu", 4); 59 while (off != -FDT_ERR_NOTFOUND) { 60 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); 61 if (reg) { 62 core_id = fdt_read_number(reg, addr_cells); 63 if (!test_bit(id_to_core(core_id), &mask)) { 64 fdt_del_node(blob, off); 65 off = off_prev; 66 } 67 } 68 off_prev = off; 69 off = fdt_node_offset_by_prop_value(blob, off_prev, 70 "device_type", "cpu", 4); 71 } 72 73 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \ 74 defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI) 75 int node; 76 u32 psci_ver; 77 78 /* Check the psci version to determine if the psci is supported */ 79 psci_ver = sec_firmware_support_psci_version(); 80 if (psci_ver == 0xffffffff) { 81 /* remove psci DT node */ 82 node = fdt_path_offset(blob, "/psci"); 83 if (node >= 0) 84 goto remove_psci_node; 85 86 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci"); 87 if (node >= 0) 88 goto remove_psci_node; 89 90 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2"); 91 if (node >= 0) 92 goto remove_psci_node; 93 94 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0"); 95 if (node >= 0) 96 goto remove_psci_node; 97 98 remove_psci_node: 99 if (node >= 0) 100 fdt_del_node(blob, node); 101 } else { 102 return; 103 } 104 #endif 105 off = fdt_path_offset(blob, "/cpus"); 106 if (off < 0) { 107 puts("couldn't find /cpus node\n"); 108 return; 109 } 110 fdt_support_default_count_cells(blob, off, &addr_cells, NULL); 111 112 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); 113 while (off != -FDT_ERR_NOTFOUND) { 114 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); 115 if (reg) { 116 core_id = fdt_read_number(reg, addr_cells); 117 if (core_id == 0 || (is_core_online(core_id))) { 118 val = spin_tbl_addr; 119 val += id_to_core(core_id) * 120 SPIN_TABLE_ELEM_SIZE; 121 val = cpu_to_fdt64(val); 122 fdt_setprop_string(blob, off, "enable-method", 123 "spin-table"); 124 fdt_setprop(blob, off, "cpu-release-addr", 125 &val, sizeof(val)); 126 } else { 127 debug("skipping offline core\n"); 128 } 129 } else { 130 puts("Warning: found cpu node without reg property\n"); 131 } 132 off = fdt_node_offset_by_prop_value(blob, off, "device_type", 133 "cpu", 4); 134 } 135 136 fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code, 137 *boot_code_size); 138 #if CONFIG_IS_ENABLED(EFI_LOADER) 139 efi_add_memory_map((uintptr_t)&secondary_boot_code, 140 ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT, 141 EFI_RESERVED_MEMORY_TYPE, false); 142 #endif 143 } 144 #endif 145 146 void fsl_fdt_disable_usb(void *blob) 147 { 148 int off; 149 /* 150 * SYSCLK is used as a reference clock for USB. When the USB 151 * controller is used, SYSCLK must meet the additional requirement 152 * of 100 MHz. 153 */ 154 if (CONFIG_SYS_CLK_FREQ != 100000000) { 155 off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3"); 156 while (off != -FDT_ERR_NOTFOUND) { 157 fdt_status_disabled(blob, off); 158 off = fdt_node_offset_by_compatible(blob, off, 159 "snps,dwc3"); 160 } 161 } 162 } 163 164 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN 165 static void fdt_fixup_gic(void *blob) 166 { 167 int offset, err; 168 u64 reg[8]; 169 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); 170 unsigned int val; 171 struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR; 172 int align_64k = 0; 173 174 val = gur_in32(&gur->svr); 175 176 if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) { 177 align_64k = 1; 178 } else if (SVR_REV(val) != REV1_0) { 179 val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT); 180 if (!val) 181 align_64k = 1; 182 } 183 184 offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000"); 185 if (offset < 0) { 186 printf("WARNING: fdt_subnode_offset can't find node %s: %s\n", 187 "interrupt-controller@1400000", fdt_strerror(offset)); 188 return; 189 } 190 191 /* Fixup gic node align with 64K */ 192 if (align_64k) { 193 reg[0] = cpu_to_fdt64(GICD_BASE_64K); 194 reg[1] = cpu_to_fdt64(GICD_SIZE_64K); 195 reg[2] = cpu_to_fdt64(GICC_BASE_64K); 196 reg[3] = cpu_to_fdt64(GICC_SIZE_64K); 197 reg[4] = cpu_to_fdt64(GICH_BASE_64K); 198 reg[5] = cpu_to_fdt64(GICH_SIZE_64K); 199 reg[6] = cpu_to_fdt64(GICV_BASE_64K); 200 reg[7] = cpu_to_fdt64(GICV_SIZE_64K); 201 } else { 202 /* Fixup gic node align with default */ 203 reg[0] = cpu_to_fdt64(GICD_BASE); 204 reg[1] = cpu_to_fdt64(GICD_SIZE); 205 reg[2] = cpu_to_fdt64(GICC_BASE); 206 reg[3] = cpu_to_fdt64(GICC_SIZE); 207 reg[4] = cpu_to_fdt64(GICH_BASE); 208 reg[5] = cpu_to_fdt64(GICH_SIZE); 209 reg[6] = cpu_to_fdt64(GICV_BASE); 210 reg[7] = cpu_to_fdt64(GICV_SIZE); 211 } 212 213 err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg)); 214 if (err < 0) { 215 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n", 216 "reg", "interrupt-controller@1400000", 217 fdt_strerror(err)); 218 return; 219 } 220 221 return; 222 } 223 #endif 224 225 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI 226 static int _fdt_fixup_msi_node(void *blob, const char *name, 227 int irq_0, int irq_1, int rev) 228 { 229 int err, offset, len; 230 u32 tmp[4][3]; 231 void *p; 232 233 offset = fdt_path_offset(blob, name); 234 if (offset < 0) { 235 printf("WARNING: fdt_path_offset can't find path %s: %s\n", 236 name, fdt_strerror(offset)); 237 return 0; 238 } 239 240 /*fixup the property of interrupts*/ 241 242 tmp[0][0] = cpu_to_fdt32(0x0); 243 tmp[0][1] = cpu_to_fdt32(irq_0); 244 tmp[0][2] = cpu_to_fdt32(0x4); 245 246 if (rev > REV1_0) { 247 tmp[1][0] = cpu_to_fdt32(0x0); 248 tmp[1][1] = cpu_to_fdt32(irq_1); 249 tmp[1][2] = cpu_to_fdt32(0x4); 250 tmp[2][0] = cpu_to_fdt32(0x0); 251 tmp[2][1] = cpu_to_fdt32(irq_1 + 1); 252 tmp[2][2] = cpu_to_fdt32(0x4); 253 tmp[3][0] = cpu_to_fdt32(0x0); 254 tmp[3][1] = cpu_to_fdt32(irq_1 + 2); 255 tmp[3][2] = cpu_to_fdt32(0x4); 256 len = sizeof(tmp); 257 } else { 258 len = sizeof(tmp[0]); 259 } 260 261 err = fdt_setprop(blob, offset, "interrupts", tmp, len); 262 if (err < 0) { 263 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n", 264 "interrupts", name, fdt_strerror(err)); 265 return 0; 266 } 267 268 /*fixup the property of reg*/ 269 p = (char *)fdt_getprop(blob, offset, "reg", &len); 270 if (!p) { 271 printf("WARNING: fdt_getprop can't get %s from node %s\n", 272 "reg", name); 273 return 0; 274 } 275 276 memcpy((char *)tmp, p, len); 277 278 if (rev > REV1_0) 279 *((u32 *)tmp + 3) = cpu_to_fdt32(0x1000); 280 else 281 *((u32 *)tmp + 3) = cpu_to_fdt32(0x8); 282 283 err = fdt_setprop(blob, offset, "reg", tmp, len); 284 if (err < 0) { 285 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n", 286 "reg", name, fdt_strerror(err)); 287 return 0; 288 } 289 290 /*fixup the property of compatible*/ 291 if (rev > REV1_0) 292 err = fdt_setprop_string(blob, offset, "compatible", 293 "fsl,ls1043a-v1.1-msi"); 294 else 295 err = fdt_setprop_string(blob, offset, "compatible", 296 "fsl,ls1043a-msi"); 297 if (err < 0) { 298 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n", 299 "compatible", name, fdt_strerror(err)); 300 return 0; 301 } 302 303 return 1; 304 } 305 306 static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev) 307 { 308 int offset, len, err; 309 void *p; 310 int val; 311 u32 tmp[4][8]; 312 313 offset = fdt_path_offset(blob, name); 314 if (offset < 0) { 315 printf("WARNING: fdt_path_offset can't find path %s: %s\n", 316 name, fdt_strerror(offset)); 317 return 0; 318 } 319 320 p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len); 321 if (!p || len != sizeof(tmp)) { 322 printf("WARNING: fdt_getprop can't get %s from node %s\n", 323 "interrupt-map", name); 324 return 0; 325 } 326 327 memcpy((char *)tmp, p, len); 328 329 val = fdt32_to_cpu(tmp[0][6]); 330 if (rev > REV1_0) { 331 tmp[1][6] = cpu_to_fdt32(val + 1); 332 tmp[2][6] = cpu_to_fdt32(val + 2); 333 tmp[3][6] = cpu_to_fdt32(val + 3); 334 } else { 335 tmp[1][6] = cpu_to_fdt32(val); 336 tmp[2][6] = cpu_to_fdt32(val); 337 tmp[3][6] = cpu_to_fdt32(val); 338 } 339 340 err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp)); 341 if (err < 0) { 342 printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n", 343 "interrupt-map", name, fdt_strerror(err)); 344 return 0; 345 } 346 return 1; 347 } 348 349 /* Fixup msi node for ls1043a rev1.1*/ 350 351 static void fdt_fixup_msi(void *blob) 352 { 353 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); 354 unsigned int rev; 355 356 rev = gur_in32(&gur->svr); 357 358 if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A))) 359 return; 360 361 rev = SVR_REV(rev); 362 363 _fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000", 364 116, 111, rev); 365 _fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000", 366 126, 121, rev); 367 _fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000", 368 160, 155, rev); 369 370 _fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev); 371 _fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev); 372 _fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev); 373 } 374 #endif 375 376 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT 377 /* Remove JR node used by SEC firmware */ 378 void fdt_fixup_remove_jr(void *blob) 379 { 380 int jr_node, addr_cells, len; 381 int crypto_node = fdt_path_offset(blob, "crypto"); 382 u64 jr_offset, used_jr; 383 fdt32_t *reg; 384 385 used_jr = sec_firmware_used_jobring_offset(); 386 fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL); 387 388 jr_node = fdt_node_offset_by_compatible(blob, crypto_node, 389 "fsl,sec-v4.0-job-ring"); 390 391 while (jr_node != -FDT_ERR_NOTFOUND) { 392 reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len); 393 jr_offset = fdt_read_number(reg, addr_cells); 394 if (jr_offset == used_jr) { 395 fdt_del_node(blob, jr_node); 396 break; 397 } 398 jr_node = fdt_node_offset_by_compatible(blob, jr_node, 399 "fsl,sec-v4.0-job-ring"); 400 } 401 } 402 #endif 403 404 void ft_cpu_setup(void *blob, bd_t *bd) 405 { 406 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); 407 unsigned int svr = gur_in32(&gur->svr); 408 409 /* delete crypto node if not on an E-processor */ 410 if (!IS_E_PROCESSOR(svr)) 411 fdt_fixup_crypto_node(blob, 0); 412 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4 413 else { 414 ccsr_sec_t __iomem *sec; 415 416 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT 417 fdt_fixup_remove_jr(blob); 418 fdt_fixup_kaslr(blob); 419 #endif 420 421 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR; 422 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms)); 423 } 424 #endif 425 426 #ifdef CONFIG_MP 427 ft_fixup_cpu(blob); 428 #endif 429 430 #ifdef CONFIG_SYS_NS16550 431 do_fixup_by_compat_u32(blob, "fsl,ns16550", 432 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); 433 #endif 434 435 do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency", 436 CONFIG_SYS_CLK_FREQ, 1); 437 438 #ifdef CONFIG_PCI 439 ft_pci_setup(blob, bd); 440 #endif 441 442 #ifdef CONFIG_FSL_ESDHC 443 fdt_fixup_esdhc(blob, bd); 444 #endif 445 446 #ifdef CONFIG_SYS_DPAA_QBMAN 447 fdt_fixup_bportals(blob); 448 fdt_fixup_qportals(blob); 449 do_fixup_by_compat_u32(blob, "fsl,qman", 450 "clock-frequency", get_qman_freq(), 1); 451 #endif 452 453 #ifdef CONFIG_SYS_DPAA_FMAN 454 fdt_fixup_fman_firmware(blob); 455 #endif 456 #ifndef CONFIG_ARCH_LS1012A 457 fsl_fdt_disable_usb(blob); 458 #endif 459 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN 460 fdt_fixup_gic(blob); 461 #endif 462 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI 463 fdt_fixup_msi(blob); 464 #endif 465 } 466