1 /* 2 * Copyright 2014-2015 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <libfdt.h> 9 #include <fdt_support.h> 10 #include <phy.h> 11 #ifdef CONFIG_FSL_LSCH3 12 #include <asm/arch/fdt.h> 13 #endif 14 #ifdef CONFIG_FSL_ESDHC 15 #include <fsl_esdhc.h> 16 #endif 17 #ifdef CONFIG_SYS_DPAA_FMAN 18 #include <fsl_fman.h> 19 #endif 20 #ifdef CONFIG_MP 21 #include <asm/arch/mp.h> 22 #endif 23 24 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) 25 { 26 return fdt_setprop_string(blob, offset, "phy-connection-type", 27 phy_string_for_interface(phyc)); 28 } 29 30 #ifdef CONFIG_MP 31 void ft_fixup_cpu(void *blob) 32 { 33 int off; 34 __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr(); 35 fdt32_t *reg; 36 int addr_cells; 37 u64 val, core_id; 38 size_t *boot_code_size = &(__secondary_boot_code_size); 39 40 off = fdt_path_offset(blob, "/cpus"); 41 if (off < 0) { 42 puts("couldn't find /cpus node\n"); 43 return; 44 } 45 of_bus_default_count_cells(blob, off, &addr_cells, NULL); 46 47 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); 48 while (off != -FDT_ERR_NOTFOUND) { 49 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); 50 if (reg) { 51 core_id = of_read_number(reg, addr_cells); 52 if (core_id == 0 || (is_core_online(core_id))) { 53 val = spin_tbl_addr; 54 val += id_to_core(core_id) * 55 SPIN_TABLE_ELEM_SIZE; 56 val = cpu_to_fdt64(val); 57 fdt_setprop_string(blob, off, "enable-method", 58 "spin-table"); 59 fdt_setprop(blob, off, "cpu-release-addr", 60 &val, sizeof(val)); 61 } else { 62 debug("skipping offline core\n"); 63 } 64 } else { 65 puts("Warning: found cpu node without reg property\n"); 66 } 67 off = fdt_node_offset_by_prop_value(blob, off, "device_type", 68 "cpu", 4); 69 } 70 71 fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code, 72 *boot_code_size); 73 } 74 #endif 75 76 /* 77 * the burden is on the the caller to not request a count 78 * exceeding the bounds of the stream_ids[] array 79 */ 80 void alloc_stream_ids(int start_id, int count, u32 *stream_ids, int max_cnt) 81 { 82 int i; 83 84 if (count > max_cnt) { 85 printf("\n%s: ERROR: max per-device stream ID count exceed\n", 86 __func__); 87 return; 88 } 89 90 for (i = 0; i < count; i++) 91 stream_ids[i] = start_id++; 92 } 93 94 /* 95 * This function updates the mmu-masters property on the SMMU 96 * node as per the SMMU binding-- phandle and list of stream IDs 97 * for each MMU master. 98 */ 99 void append_mmu_masters(void *blob, const char *smmu_path, 100 const char *master_name, u32 *stream_ids, int count) 101 { 102 u32 phandle; 103 int smmu_nodeoffset; 104 int master_nodeoffset; 105 int i; 106 107 /* get phandle of mmu master device */ 108 master_nodeoffset = fdt_path_offset(blob, master_name); 109 if (master_nodeoffset < 0) { 110 printf("\n%s: ERROR: master not found\n", __func__); 111 return; 112 } 113 phandle = fdt_get_phandle(blob, master_nodeoffset); 114 if (!phandle) { /* if master has no phandle, create one */ 115 phandle = fdt_create_phandle(blob, master_nodeoffset); 116 if (!phandle) { 117 printf("\n%s: ERROR: unable to create phandle\n", 118 __func__); 119 return; 120 } 121 } 122 123 /* append it to mmu-masters */ 124 smmu_nodeoffset = fdt_path_offset(blob, smmu_path); 125 if (fdt_appendprop_u32(blob, smmu_nodeoffset, "mmu-masters", 126 phandle) < 0) { 127 printf("\n%s: ERROR: unable to update SMMU node\n", __func__); 128 return; 129 } 130 131 /* for each stream ID, append to mmu-masters */ 132 for (i = 0; i < count; i++) { 133 fdt_appendprop_u32(blob, smmu_nodeoffset, "mmu-masters", 134 stream_ids[i]); 135 } 136 137 /* fix up #stream-id-cells with stream ID count */ 138 if (fdt_setprop_u32(blob, master_nodeoffset, "#stream-id-cells", 139 count) < 0) 140 printf("\n%s: ERROR: unable to update #stream-id-cells\n", 141 __func__); 142 } 143 144 145 /* 146 * The info below summarizes how streamID partitioning works 147 * for ls2080a and how it is conveyed to the OS via the device tree. 148 * 149 * -non-PCI legacy, platform devices (USB, SD/MMC, SATA, DMA) 150 * -all legacy devices get a unique ICID assigned and programmed in 151 * their AMQR registers by u-boot 152 * -u-boot updates the hardware device tree with streamID properties 153 * for each platform/legacy device (smmu-masters property) 154 * 155 * -PCIe 156 * -for each PCI controller that is active (as per RCW settings), 157 * u-boot will allocate a range of ICID and convey that to Linux via 158 * the device tree (smmu-masters property) 159 * 160 * -DPAA2 161 * -u-boot will allocate a range of ICIDs to be used by the Management 162 * Complex for containers and will set these values in the MC DPC image. 163 * -the MC is responsible for allocating and setting up ICIDs 164 * for all DPAA2 devices. 165 * 166 */ 167 #ifdef CONFIG_FSL_LSCH3 168 static void fdt_fixup_smmu(void *blob) 169 { 170 int nodeoffset; 171 172 nodeoffset = fdt_path_offset(blob, "/iommu@5000000"); 173 if (nodeoffset < 0) { 174 printf("\n%s: WARNING: no SMMU node found\n", __func__); 175 return; 176 } 177 178 /* fixup for all PCI controllers */ 179 #ifdef CONFIG_PCI 180 fdt_fixup_smmu_pcie(blob); 181 #endif 182 } 183 #endif 184 185 void ft_cpu_setup(void *blob, bd_t *bd) 186 { 187 #ifdef CONFIG_MP 188 ft_fixup_cpu(blob); 189 #endif 190 191 #ifdef CONFIG_SYS_NS16550 192 do_fixup_by_compat_u32(blob, "fsl,ns16550", 193 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); 194 #endif 195 196 do_fixup_by_compat_u32(blob, "fixed-clock", 197 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); 198 199 #ifdef CONFIG_PCI 200 ft_pci_setup(blob, bd); 201 #endif 202 203 #ifdef CONFIG_FSL_ESDHC 204 fdt_fixup_esdhc(blob, bd); 205 #endif 206 207 #ifdef CONFIG_FSL_LSCH3 208 fdt_fixup_smmu(blob); 209 #endif 210 211 #ifdef CONFIG_SYS_DPAA_FMAN 212 fdt_fixup_fman_firmware(blob); 213 #endif 214 } 215