1ddd8a080SPrabhakar KushwahaSoC overview 2ddd8a080SPrabhakar Kushwaha 3ddd8a080SPrabhakar Kushwaha 1. LS1043A 4ddd8a080SPrabhakar Kushwaha 2. LS2080A 5*b7f2bbffSPrabhakar Kushwaha 3. LS1012A 6ddd8a080SPrabhakar Kushwaha 7ddd8a080SPrabhakar KushwahaLS1043A 8ddd8a080SPrabhakar Kushwaha--------- 9ddd8a080SPrabhakar KushwahaThe LS1043A integrated multicore processor combines four ARM Cortex-A53 10ddd8a080SPrabhakar Kushwahaprocessor cores with datapath acceleration optimized for L2/3 packet 11ddd8a080SPrabhakar Kushwahaprocessing, single pass security offload and robust traffic management 12ddd8a080SPrabhakar Kushwahaand quality of service. 13ddd8a080SPrabhakar Kushwaha 14ddd8a080SPrabhakar KushwahaThe LS1043A SoC includes the following function and features: 15ddd8a080SPrabhakar Kushwaha - Four 64-bit ARM Cortex-A53 CPUs 16ddd8a080SPrabhakar Kushwaha - 1 MB unified L2 Cache 17ddd8a080SPrabhakar Kushwaha - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving 18ddd8a080SPrabhakar Kushwaha support 19ddd8a080SPrabhakar Kushwaha - Data Path Acceleration Architecture (DPAA) incorporating acceleration the 20ddd8a080SPrabhakar Kushwaha the following functions: 21ddd8a080SPrabhakar Kushwaha - Packet parsing, classification, and distribution (FMan) 22ddd8a080SPrabhakar Kushwaha - Queue management for scheduling, packet sequencing, and congestion 23ddd8a080SPrabhakar Kushwaha management (QMan) 24ddd8a080SPrabhakar Kushwaha - Hardware buffer management for buffer allocation and de-allocation (BMan) 25ddd8a080SPrabhakar Kushwaha - Cryptography acceleration (SEC) 26ddd8a080SPrabhakar Kushwaha - Ethernet interfaces by FMan 27ddd8a080SPrabhakar Kushwaha - Up to 1 x XFI supporting 10G interface 28ddd8a080SPrabhakar Kushwaha - Up to 1 x QSGMII 29ddd8a080SPrabhakar Kushwaha - Up to 4 x SGMII supporting 1000Mbps 30ddd8a080SPrabhakar Kushwaha - Up to 2 x SGMII supporting 2500Mbps 31ddd8a080SPrabhakar Kushwaha - Up to 2 x RGMII supporting 1000Mbps 32ddd8a080SPrabhakar Kushwaha - High-speed peripheral interfaces 33ddd8a080SPrabhakar Kushwaha - Three PCIe 2.0 controllers, one supporting x4 operation 34ddd8a080SPrabhakar Kushwaha - One serial ATA (SATA 3.0) controllers 35ddd8a080SPrabhakar Kushwaha - Additional peripheral interfaces 36ddd8a080SPrabhakar Kushwaha - Three high-speed USB 3.0 controllers with integrated PHY 37ddd8a080SPrabhakar Kushwaha - Enhanced secure digital host controller (eSDXC/eMMC) 38ddd8a080SPrabhakar Kushwaha - Quad Serial Peripheral Interface (QSPI) Controller 39ddd8a080SPrabhakar Kushwaha - Serial peripheral interface (SPI) controller 40ddd8a080SPrabhakar Kushwaha - Four I2C controllers 41ddd8a080SPrabhakar Kushwaha - Two DUARTs 42ddd8a080SPrabhakar Kushwaha - Integrated flash controller supporting NAND and NOR flash 43ddd8a080SPrabhakar Kushwaha - QorIQ platform's trust architecture 2.1 44ddd8a080SPrabhakar Kushwaha 45ddd8a080SPrabhakar KushwahaLS2080A 46ddd8a080SPrabhakar Kushwaha-------- 47ddd8a080SPrabhakar KushwahaThe LS2080A integrated multicore processor combines eight ARM Cortex-A57 48ddd8a080SPrabhakar Kushwahaprocessor cores with high-performance data path acceleration logic and network 49ddd8a080SPrabhakar Kushwahaand peripheral bus interfaces required for networking, telecom/datacom, 50ddd8a080SPrabhakar Kushwahawireless infrastructure, and mil/aerospace applications. 51ddd8a080SPrabhakar Kushwaha 52ddd8a080SPrabhakar KushwahaThe LS2080A SoC includes the following function and features: 53ddd8a080SPrabhakar Kushwaha 54ddd8a080SPrabhakar Kushwaha - Eight 64-bit ARM Cortex-A57 CPUs 55ddd8a080SPrabhakar Kushwaha - 1 MB platform cache with ECC 56ddd8a080SPrabhakar Kushwaha - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support 57ddd8a080SPrabhakar Kushwaha - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by 58ddd8a080SPrabhakar Kushwaha the AIOP 59ddd8a080SPrabhakar Kushwaha - Data path acceleration architecture (DPAA2) incorporating acceleration for 60ddd8a080SPrabhakar Kushwaha the following functions: 61ddd8a080SPrabhakar Kushwaha - Packet parsing, classification, and distribution (WRIOP) 62ddd8a080SPrabhakar Kushwaha - Queue and Hardware buffer management for scheduling, packet sequencing, and 63ddd8a080SPrabhakar Kushwaha congestion management, buffer allocation and de-allocation (QBMan) 64ddd8a080SPrabhakar Kushwaha - Cryptography acceleration (SEC) at up to 10 Gbps 65ddd8a080SPrabhakar Kushwaha - RegEx pattern matching acceleration (PME) at up to 10 Gbps 66ddd8a080SPrabhakar Kushwaha - Decompression/compression acceleration (DCE) at up to 20 Gbps 67ddd8a080SPrabhakar Kushwaha - Accelerated I/O processing (AIOP) at up to 20 Gbps 68ddd8a080SPrabhakar Kushwaha - QDMA engine 69ddd8a080SPrabhakar Kushwaha - 16 SerDes lanes at up to 10.3125 GHz 70ddd8a080SPrabhakar Kushwaha - Ethernet interfaces 71ddd8a080SPrabhakar Kushwaha - Up to eight 10 Gbps Ethernet MACs 72ddd8a080SPrabhakar Kushwaha - Up to eight 1 / 2.5 Gbps Ethernet MACs 73ddd8a080SPrabhakar Kushwaha - High-speed peripheral interfaces 74ddd8a080SPrabhakar Kushwaha - Four PCIe 3.0 controllers, one supporting SR-IOV 75ddd8a080SPrabhakar Kushwaha - Additional peripheral interfaces 76ddd8a080SPrabhakar Kushwaha - Two serial ATA (SATA 3.0) controllers 77ddd8a080SPrabhakar Kushwaha - Two high-speed USB 3.0 controllers with integrated PHY 78ddd8a080SPrabhakar Kushwaha - Enhanced secure digital host controller (eSDXC/eMMC) 79ddd8a080SPrabhakar Kushwaha - Serial peripheral interface (SPI) controller 80ddd8a080SPrabhakar Kushwaha - Quad Serial Peripheral Interface (QSPI) Controller 81ddd8a080SPrabhakar Kushwaha - Four I2C controllers 82ddd8a080SPrabhakar Kushwaha - Two DUARTs 83ddd8a080SPrabhakar Kushwaha - Integrated flash controller (IFC 2.0) supporting NAND and NOR flash 84ddd8a080SPrabhakar Kushwaha - Support for hardware virtualization and partitioning enforcement 85ddd8a080SPrabhakar Kushwaha - QorIQ platform's trust architecture 3.0 86ddd8a080SPrabhakar Kushwaha - Service processor (SP) provides pre-boot initialization and secure-boot 87ddd8a080SPrabhakar Kushwaha capabilities 88*b7f2bbffSPrabhakar Kushwaha 89*b7f2bbffSPrabhakar KushwahaLS1012A 90*b7f2bbffSPrabhakar Kushwaha-------- 91*b7f2bbffSPrabhakar KushwahaThe LS1012A features an advanced 64-bit ARM v8 Cortex- 92*b7f2bbffSPrabhakar KushwahaA53 processor, with 32 KB of parity protected L1-I cache, 93*b7f2bbffSPrabhakar Kushwaha32 KB of ECC protected L1-D cache, as well as 256 KB of 94*b7f2bbffSPrabhakar KushwahaECC protected L2 cache. 95*b7f2bbffSPrabhakar Kushwaha 96*b7f2bbffSPrabhakar KushwahaThe LS1012A SoC includes the following function and features: 97*b7f2bbffSPrabhakar Kushwaha - One 64-bit ARM v8 Cortex-A53 core with the following capabilities: 98*b7f2bbffSPrabhakar Kushwaha - ARM v8 cryptography extensions 99*b7f2bbffSPrabhakar Kushwaha - One 16-bit DDR3L SDRAM memory controller, Up to 1.0 GT/s, Supports 100*b7f2bbffSPrabhakar Kushwaha 16-/8-bit operation (no ECC support) 101*b7f2bbffSPrabhakar Kushwaha - ARM core-link CCI-400 cache coherent interconnect 102*b7f2bbffSPrabhakar Kushwaha - Packet Forwarding Engine (PFE) 103*b7f2bbffSPrabhakar Kushwaha - Cryptography acceleration (SEC) 104*b7f2bbffSPrabhakar Kushwaha - Ethernet interfaces supported by PFE: 105*b7f2bbffSPrabhakar Kushwaha - One Configurable x3 SerDes: 106*b7f2bbffSPrabhakar Kushwaha Two Serdes PLLs supported for usage by any SerDes data lane 107*b7f2bbffSPrabhakar Kushwaha Support for up to 6 GBaud operation 108*b7f2bbffSPrabhakar Kushwaha - High-speed peripheral interfaces: 109*b7f2bbffSPrabhakar Kushwaha - One PCI Express Gen2 controller, supporting x1 operation 110*b7f2bbffSPrabhakar Kushwaha - One serial ATA (SATA Gen 3.0) controller 111*b7f2bbffSPrabhakar Kushwaha - One USB 3.0/2.0 controller with integrated PHY 112*b7f2bbffSPrabhakar Kushwaha - One USB 2.0 controller with ULPI interface. . 113*b7f2bbffSPrabhakar Kushwaha - Additional peripheral interfaces: 114*b7f2bbffSPrabhakar Kushwaha - One quad serial peripheral interface (QuadSPI) controller 115*b7f2bbffSPrabhakar Kushwaha - One serial peripheral interface (SPI) controller 116*b7f2bbffSPrabhakar Kushwaha - Two enhanced secure digital host controllers 117*b7f2bbffSPrabhakar Kushwaha - Two I2C controllers 118*b7f2bbffSPrabhakar Kushwaha - One 16550 compliant DUART (two UART interfaces) 119*b7f2bbffSPrabhakar Kushwaha - Two general purpose IOs (GPIO) 120*b7f2bbffSPrabhakar Kushwaha - Two FlexTimers 121*b7f2bbffSPrabhakar Kushwaha - Five synchronous audio interfaces (SAI) 122*b7f2bbffSPrabhakar Kushwaha - Pre-boot loader (PBL) provides pre-boot initialization and RCW loading 123*b7f2bbffSPrabhakar Kushwaha - Single-source clocking solution enabling generation of core, platform, 124*b7f2bbffSPrabhakar Kushwaha DDR, SerDes, and USB clocks from a single external crystal and internal 125*b7f2bbffSPrabhakar Kushwaha crystaloscillator 126*b7f2bbffSPrabhakar Kushwaha - Thermal monitor unit (TMU) with +/- 3C accuracy 127*b7f2bbffSPrabhakar Kushwaha - Two WatchDog timers 128*b7f2bbffSPrabhakar Kushwaha - ARM generic timer 129*b7f2bbffSPrabhakar Kushwaha - QorIQ platform's trust architecture 2.1 130