1ddd8a080SPrabhakar KushwahaSoC overview 2ddd8a080SPrabhakar Kushwaha 3ddd8a080SPrabhakar Kushwaha 1. LS1043A 4ddd8a080SPrabhakar Kushwaha 2. LS2080A 5b7f2bbffSPrabhakar Kushwaha 3. LS1012A 6*b528b937SMingkai Hu 4. LS1046A 7ddd8a080SPrabhakar Kushwaha 8ddd8a080SPrabhakar KushwahaLS1043A 9ddd8a080SPrabhakar Kushwaha--------- 10ddd8a080SPrabhakar KushwahaThe LS1043A integrated multicore processor combines four ARM Cortex-A53 11ddd8a080SPrabhakar Kushwahaprocessor cores with datapath acceleration optimized for L2/3 packet 12ddd8a080SPrabhakar Kushwahaprocessing, single pass security offload and robust traffic management 13ddd8a080SPrabhakar Kushwahaand quality of service. 14ddd8a080SPrabhakar Kushwaha 15ddd8a080SPrabhakar KushwahaThe LS1043A SoC includes the following function and features: 16ddd8a080SPrabhakar Kushwaha - Four 64-bit ARM Cortex-A53 CPUs 17ddd8a080SPrabhakar Kushwaha - 1 MB unified L2 Cache 18ddd8a080SPrabhakar Kushwaha - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving 19ddd8a080SPrabhakar Kushwaha support 20ddd8a080SPrabhakar Kushwaha - Data Path Acceleration Architecture (DPAA) incorporating acceleration the 21ddd8a080SPrabhakar Kushwaha the following functions: 22ddd8a080SPrabhakar Kushwaha - Packet parsing, classification, and distribution (FMan) 23ddd8a080SPrabhakar Kushwaha - Queue management for scheduling, packet sequencing, and congestion 24ddd8a080SPrabhakar Kushwaha management (QMan) 25ddd8a080SPrabhakar Kushwaha - Hardware buffer management for buffer allocation and de-allocation (BMan) 26ddd8a080SPrabhakar Kushwaha - Cryptography acceleration (SEC) 27ddd8a080SPrabhakar Kushwaha - Ethernet interfaces by FMan 28ddd8a080SPrabhakar Kushwaha - Up to 1 x XFI supporting 10G interface 29ddd8a080SPrabhakar Kushwaha - Up to 1 x QSGMII 30ddd8a080SPrabhakar Kushwaha - Up to 4 x SGMII supporting 1000Mbps 31ddd8a080SPrabhakar Kushwaha - Up to 2 x SGMII supporting 2500Mbps 32ddd8a080SPrabhakar Kushwaha - Up to 2 x RGMII supporting 1000Mbps 33ddd8a080SPrabhakar Kushwaha - High-speed peripheral interfaces 34ddd8a080SPrabhakar Kushwaha - Three PCIe 2.0 controllers, one supporting x4 operation 35ddd8a080SPrabhakar Kushwaha - One serial ATA (SATA 3.0) controllers 36ddd8a080SPrabhakar Kushwaha - Additional peripheral interfaces 37ddd8a080SPrabhakar Kushwaha - Three high-speed USB 3.0 controllers with integrated PHY 38ddd8a080SPrabhakar Kushwaha - Enhanced secure digital host controller (eSDXC/eMMC) 39ddd8a080SPrabhakar Kushwaha - Quad Serial Peripheral Interface (QSPI) Controller 40ddd8a080SPrabhakar Kushwaha - Serial peripheral interface (SPI) controller 41ddd8a080SPrabhakar Kushwaha - Four I2C controllers 42ddd8a080SPrabhakar Kushwaha - Two DUARTs 43ddd8a080SPrabhakar Kushwaha - Integrated flash controller supporting NAND and NOR flash 44ddd8a080SPrabhakar Kushwaha - QorIQ platform's trust architecture 2.1 45ddd8a080SPrabhakar Kushwaha 46ddd8a080SPrabhakar KushwahaLS2080A 47ddd8a080SPrabhakar Kushwaha-------- 48ddd8a080SPrabhakar KushwahaThe LS2080A integrated multicore processor combines eight ARM Cortex-A57 49ddd8a080SPrabhakar Kushwahaprocessor cores with high-performance data path acceleration logic and network 50ddd8a080SPrabhakar Kushwahaand peripheral bus interfaces required for networking, telecom/datacom, 51ddd8a080SPrabhakar Kushwahawireless infrastructure, and mil/aerospace applications. 52ddd8a080SPrabhakar Kushwaha 53ddd8a080SPrabhakar KushwahaThe LS2080A SoC includes the following function and features: 54ddd8a080SPrabhakar Kushwaha 55ddd8a080SPrabhakar Kushwaha - Eight 64-bit ARM Cortex-A57 CPUs 56ddd8a080SPrabhakar Kushwaha - 1 MB platform cache with ECC 57ddd8a080SPrabhakar Kushwaha - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support 58ddd8a080SPrabhakar Kushwaha - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by 59ddd8a080SPrabhakar Kushwaha the AIOP 60ddd8a080SPrabhakar Kushwaha - Data path acceleration architecture (DPAA2) incorporating acceleration for 61ddd8a080SPrabhakar Kushwaha the following functions: 62ddd8a080SPrabhakar Kushwaha - Packet parsing, classification, and distribution (WRIOP) 63ddd8a080SPrabhakar Kushwaha - Queue and Hardware buffer management for scheduling, packet sequencing, and 64ddd8a080SPrabhakar Kushwaha congestion management, buffer allocation and de-allocation (QBMan) 65ddd8a080SPrabhakar Kushwaha - Cryptography acceleration (SEC) at up to 10 Gbps 66ddd8a080SPrabhakar Kushwaha - RegEx pattern matching acceleration (PME) at up to 10 Gbps 67ddd8a080SPrabhakar Kushwaha - Decompression/compression acceleration (DCE) at up to 20 Gbps 68ddd8a080SPrabhakar Kushwaha - Accelerated I/O processing (AIOP) at up to 20 Gbps 69ddd8a080SPrabhakar Kushwaha - QDMA engine 70ddd8a080SPrabhakar Kushwaha - 16 SerDes lanes at up to 10.3125 GHz 71ddd8a080SPrabhakar Kushwaha - Ethernet interfaces 72ddd8a080SPrabhakar Kushwaha - Up to eight 10 Gbps Ethernet MACs 73ddd8a080SPrabhakar Kushwaha - Up to eight 1 / 2.5 Gbps Ethernet MACs 74ddd8a080SPrabhakar Kushwaha - High-speed peripheral interfaces 75ddd8a080SPrabhakar Kushwaha - Four PCIe 3.0 controllers, one supporting SR-IOV 76ddd8a080SPrabhakar Kushwaha - Additional peripheral interfaces 77ddd8a080SPrabhakar Kushwaha - Two serial ATA (SATA 3.0) controllers 78ddd8a080SPrabhakar Kushwaha - Two high-speed USB 3.0 controllers with integrated PHY 79ddd8a080SPrabhakar Kushwaha - Enhanced secure digital host controller (eSDXC/eMMC) 80ddd8a080SPrabhakar Kushwaha - Serial peripheral interface (SPI) controller 81ddd8a080SPrabhakar Kushwaha - Quad Serial Peripheral Interface (QSPI) Controller 82ddd8a080SPrabhakar Kushwaha - Four I2C controllers 83ddd8a080SPrabhakar Kushwaha - Two DUARTs 84ddd8a080SPrabhakar Kushwaha - Integrated flash controller (IFC 2.0) supporting NAND and NOR flash 85ddd8a080SPrabhakar Kushwaha - Support for hardware virtualization and partitioning enforcement 86ddd8a080SPrabhakar Kushwaha - QorIQ platform's trust architecture 3.0 87ddd8a080SPrabhakar Kushwaha - Service processor (SP) provides pre-boot initialization and secure-boot 88ddd8a080SPrabhakar Kushwaha capabilities 89b7f2bbffSPrabhakar Kushwaha 90b7f2bbffSPrabhakar KushwahaLS1012A 91b7f2bbffSPrabhakar Kushwaha-------- 92b7f2bbffSPrabhakar KushwahaThe LS1012A features an advanced 64-bit ARM v8 Cortex- 93b7f2bbffSPrabhakar KushwahaA53 processor, with 32 KB of parity protected L1-I cache, 94b7f2bbffSPrabhakar Kushwaha32 KB of ECC protected L1-D cache, as well as 256 KB of 95b7f2bbffSPrabhakar KushwahaECC protected L2 cache. 96b7f2bbffSPrabhakar Kushwaha 97b7f2bbffSPrabhakar KushwahaThe LS1012A SoC includes the following function and features: 98b7f2bbffSPrabhakar Kushwaha - One 64-bit ARM v8 Cortex-A53 core with the following capabilities: 99b7f2bbffSPrabhakar Kushwaha - ARM v8 cryptography extensions 100b7f2bbffSPrabhakar Kushwaha - One 16-bit DDR3L SDRAM memory controller, Up to 1.0 GT/s, Supports 101b7f2bbffSPrabhakar Kushwaha 16-/8-bit operation (no ECC support) 102b7f2bbffSPrabhakar Kushwaha - ARM core-link CCI-400 cache coherent interconnect 103b7f2bbffSPrabhakar Kushwaha - Packet Forwarding Engine (PFE) 104b7f2bbffSPrabhakar Kushwaha - Cryptography acceleration (SEC) 105b7f2bbffSPrabhakar Kushwaha - Ethernet interfaces supported by PFE: 106b7f2bbffSPrabhakar Kushwaha - One Configurable x3 SerDes: 107b7f2bbffSPrabhakar Kushwaha Two Serdes PLLs supported for usage by any SerDes data lane 108b7f2bbffSPrabhakar Kushwaha Support for up to 6 GBaud operation 109b7f2bbffSPrabhakar Kushwaha - High-speed peripheral interfaces: 110b7f2bbffSPrabhakar Kushwaha - One PCI Express Gen2 controller, supporting x1 operation 111b7f2bbffSPrabhakar Kushwaha - One serial ATA (SATA Gen 3.0) controller 112b7f2bbffSPrabhakar Kushwaha - One USB 3.0/2.0 controller with integrated PHY 113b7f2bbffSPrabhakar Kushwaha - One USB 2.0 controller with ULPI interface. . 114b7f2bbffSPrabhakar Kushwaha - Additional peripheral interfaces: 115b7f2bbffSPrabhakar Kushwaha - One quad serial peripheral interface (QuadSPI) controller 116b7f2bbffSPrabhakar Kushwaha - One serial peripheral interface (SPI) controller 117b7f2bbffSPrabhakar Kushwaha - Two enhanced secure digital host controllers 118b7f2bbffSPrabhakar Kushwaha - Two I2C controllers 119b7f2bbffSPrabhakar Kushwaha - One 16550 compliant DUART (two UART interfaces) 120b7f2bbffSPrabhakar Kushwaha - Two general purpose IOs (GPIO) 121b7f2bbffSPrabhakar Kushwaha - Two FlexTimers 122b7f2bbffSPrabhakar Kushwaha - Five synchronous audio interfaces (SAI) 123b7f2bbffSPrabhakar Kushwaha - Pre-boot loader (PBL) provides pre-boot initialization and RCW loading 124b7f2bbffSPrabhakar Kushwaha - Single-source clocking solution enabling generation of core, platform, 125b7f2bbffSPrabhakar Kushwaha DDR, SerDes, and USB clocks from a single external crystal and internal 126b7f2bbffSPrabhakar Kushwaha crystaloscillator 127b7f2bbffSPrabhakar Kushwaha - Thermal monitor unit (TMU) with +/- 3C accuracy 128b7f2bbffSPrabhakar Kushwaha - Two WatchDog timers 129b7f2bbffSPrabhakar Kushwaha - ARM generic timer 130b7f2bbffSPrabhakar Kushwaha - QorIQ platform's trust architecture 2.1 131*b528b937SMingkai Hu 132*b528b937SMingkai HuLS1046A 133*b528b937SMingkai Hu-------- 134*b528b937SMingkai HuThe LS1046A integrated multicore processor combines four ARM Cortex-A72 135*b528b937SMingkai Huprocessor cores with datapath acceleration optimized for L2/3 packet 136*b528b937SMingkai Huprocessing, single pass security offload and robust traffic management 137*b528b937SMingkai Huand quality of service. 138*b528b937SMingkai Hu 139*b528b937SMingkai HuThe LS1046A SoC includes the following function and features: 140*b528b937SMingkai Hu - Four 64-bit ARM Cortex-A72 CPUs 141*b528b937SMingkai Hu - 2 MB unified L2 Cache 142*b528b937SMingkai Hu - One 64-bit DDR4 SDRAM memory controllers with ECC and interleaving 143*b528b937SMingkai Hu support 144*b528b937SMingkai Hu - Data Path Acceleration Architecture (DPAA) incorporating acceleration the 145*b528b937SMingkai Hu the following functions: 146*b528b937SMingkai Hu - Packet parsing, classification, and distribution (FMan) 147*b528b937SMingkai Hu - Queue management for scheduling, packet sequencing, and congestion 148*b528b937SMingkai Hu management (QMan) 149*b528b937SMingkai Hu - Hardware buffer management for buffer allocation and de-allocation (BMan) 150*b528b937SMingkai Hu - Cryptography acceleration (SEC) 151*b528b937SMingkai Hu - Two Configurable x4 SerDes 152*b528b937SMingkai Hu - Two PLLs per four-lane SerDes 153*b528b937SMingkai Hu - Support for 10G operation 154*b528b937SMingkai Hu - Ethernet interfaces by FMan 155*b528b937SMingkai Hu - Up to 2 x XFI supporting 10G interface (MAC 9, 10) 156*b528b937SMingkai Hu - Up to 1 x QSGMII (MAC 5, 6, 10, 1) 157*b528b937SMingkai Hu - Up to 4 x SGMII supporting 1000Mbps (MAC 5, 6, 9, 10) 158*b528b937SMingkai Hu - Up to 3 x SGMII supporting 2500Mbps (MAC 5, 9, 10) 159*b528b937SMingkai Hu - Up to 2 x RGMII supporting 1000Mbps (MAC 3, 4) 160*b528b937SMingkai Hu - High-speed peripheral interfaces 161*b528b937SMingkai Hu - Three PCIe 3.0 controllers, one supporting x4 operation 162*b528b937SMingkai Hu - One serial ATA (SATA 3.0) controllers 163*b528b937SMingkai Hu - Additional peripheral interfaces 164*b528b937SMingkai Hu - Three high-speed USB 3.0 controllers with integrated PHY 165*b528b937SMingkai Hu - Enhanced secure digital host controller (eSDXC/eMMC) 166*b528b937SMingkai Hu - Quad Serial Peripheral Interface (QSPI) Controller 167*b528b937SMingkai Hu - Serial peripheral interface (SPI) controller 168*b528b937SMingkai Hu - Four I2C controllers 169*b528b937SMingkai Hu - Two DUARTs 170*b528b937SMingkai Hu - Integrated flash controller (IFC) supporting NAND and NOR flash 171*b528b937SMingkai Hu - QorIQ platform's trust architecture 2.1 172