1ddd8a080SPrabhakar KushwahaSoC overview 2ddd8a080SPrabhakar Kushwaha 3ddd8a080SPrabhakar Kushwaha 1. LS1043A 4ddd8a080SPrabhakar Kushwaha 2. LS2080A 5b7f2bbffSPrabhakar Kushwaha 3. LS1012A 6b528b937SMingkai Hu 4. LS1046A 7*9ae836cdSPriyanka Jain 5. LS2088A 8ddd8a080SPrabhakar Kushwaha 9ddd8a080SPrabhakar KushwahaLS1043A 10ddd8a080SPrabhakar Kushwaha--------- 11ddd8a080SPrabhakar KushwahaThe LS1043A integrated multicore processor combines four ARM Cortex-A53 12ddd8a080SPrabhakar Kushwahaprocessor cores with datapath acceleration optimized for L2/3 packet 13ddd8a080SPrabhakar Kushwahaprocessing, single pass security offload and robust traffic management 14ddd8a080SPrabhakar Kushwahaand quality of service. 15ddd8a080SPrabhakar Kushwaha 16ddd8a080SPrabhakar KushwahaThe LS1043A SoC includes the following function and features: 17ddd8a080SPrabhakar Kushwaha - Four 64-bit ARM Cortex-A53 CPUs 18ddd8a080SPrabhakar Kushwaha - 1 MB unified L2 Cache 19ddd8a080SPrabhakar Kushwaha - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving 20ddd8a080SPrabhakar Kushwaha support 21ddd8a080SPrabhakar Kushwaha - Data Path Acceleration Architecture (DPAA) incorporating acceleration the 22ddd8a080SPrabhakar Kushwaha the following functions: 23ddd8a080SPrabhakar Kushwaha - Packet parsing, classification, and distribution (FMan) 24ddd8a080SPrabhakar Kushwaha - Queue management for scheduling, packet sequencing, and congestion 25ddd8a080SPrabhakar Kushwaha management (QMan) 26ddd8a080SPrabhakar Kushwaha - Hardware buffer management for buffer allocation and de-allocation (BMan) 27ddd8a080SPrabhakar Kushwaha - Cryptography acceleration (SEC) 28ddd8a080SPrabhakar Kushwaha - Ethernet interfaces by FMan 29ddd8a080SPrabhakar Kushwaha - Up to 1 x XFI supporting 10G interface 30ddd8a080SPrabhakar Kushwaha - Up to 1 x QSGMII 31ddd8a080SPrabhakar Kushwaha - Up to 4 x SGMII supporting 1000Mbps 32ddd8a080SPrabhakar Kushwaha - Up to 2 x SGMII supporting 2500Mbps 33ddd8a080SPrabhakar Kushwaha - Up to 2 x RGMII supporting 1000Mbps 34ddd8a080SPrabhakar Kushwaha - High-speed peripheral interfaces 35ddd8a080SPrabhakar Kushwaha - Three PCIe 2.0 controllers, one supporting x4 operation 36ddd8a080SPrabhakar Kushwaha - One serial ATA (SATA 3.0) controllers 37ddd8a080SPrabhakar Kushwaha - Additional peripheral interfaces 38ddd8a080SPrabhakar Kushwaha - Three high-speed USB 3.0 controllers with integrated PHY 39ddd8a080SPrabhakar Kushwaha - Enhanced secure digital host controller (eSDXC/eMMC) 40ddd8a080SPrabhakar Kushwaha - Quad Serial Peripheral Interface (QSPI) Controller 41ddd8a080SPrabhakar Kushwaha - Serial peripheral interface (SPI) controller 42ddd8a080SPrabhakar Kushwaha - Four I2C controllers 43ddd8a080SPrabhakar Kushwaha - Two DUARTs 44ddd8a080SPrabhakar Kushwaha - Integrated flash controller supporting NAND and NOR flash 45ddd8a080SPrabhakar Kushwaha - QorIQ platform's trust architecture 2.1 46ddd8a080SPrabhakar Kushwaha 47ddd8a080SPrabhakar KushwahaLS2080A 48ddd8a080SPrabhakar Kushwaha-------- 49ddd8a080SPrabhakar KushwahaThe LS2080A integrated multicore processor combines eight ARM Cortex-A57 50ddd8a080SPrabhakar Kushwahaprocessor cores with high-performance data path acceleration logic and network 51ddd8a080SPrabhakar Kushwahaand peripheral bus interfaces required for networking, telecom/datacom, 52ddd8a080SPrabhakar Kushwahawireless infrastructure, and mil/aerospace applications. 53ddd8a080SPrabhakar Kushwaha 54ddd8a080SPrabhakar KushwahaThe LS2080A SoC includes the following function and features: 55ddd8a080SPrabhakar Kushwaha 56ddd8a080SPrabhakar Kushwaha - Eight 64-bit ARM Cortex-A57 CPUs 57ddd8a080SPrabhakar Kushwaha - 1 MB platform cache with ECC 58ddd8a080SPrabhakar Kushwaha - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support 59ddd8a080SPrabhakar Kushwaha - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by 60ddd8a080SPrabhakar Kushwaha the AIOP 61ddd8a080SPrabhakar Kushwaha - Data path acceleration architecture (DPAA2) incorporating acceleration for 62ddd8a080SPrabhakar Kushwaha the following functions: 63ddd8a080SPrabhakar Kushwaha - Packet parsing, classification, and distribution (WRIOP) 64ddd8a080SPrabhakar Kushwaha - Queue and Hardware buffer management for scheduling, packet sequencing, and 65ddd8a080SPrabhakar Kushwaha congestion management, buffer allocation and de-allocation (QBMan) 66ddd8a080SPrabhakar Kushwaha - Cryptography acceleration (SEC) at up to 10 Gbps 67ddd8a080SPrabhakar Kushwaha - RegEx pattern matching acceleration (PME) at up to 10 Gbps 68ddd8a080SPrabhakar Kushwaha - Decompression/compression acceleration (DCE) at up to 20 Gbps 69ddd8a080SPrabhakar Kushwaha - Accelerated I/O processing (AIOP) at up to 20 Gbps 70ddd8a080SPrabhakar Kushwaha - QDMA engine 71ddd8a080SPrabhakar Kushwaha - 16 SerDes lanes at up to 10.3125 GHz 72ddd8a080SPrabhakar Kushwaha - Ethernet interfaces 73ddd8a080SPrabhakar Kushwaha - Up to eight 10 Gbps Ethernet MACs 74ddd8a080SPrabhakar Kushwaha - Up to eight 1 / 2.5 Gbps Ethernet MACs 75ddd8a080SPrabhakar Kushwaha - High-speed peripheral interfaces 76ddd8a080SPrabhakar Kushwaha - Four PCIe 3.0 controllers, one supporting SR-IOV 77ddd8a080SPrabhakar Kushwaha - Additional peripheral interfaces 78ddd8a080SPrabhakar Kushwaha - Two serial ATA (SATA 3.0) controllers 79ddd8a080SPrabhakar Kushwaha - Two high-speed USB 3.0 controllers with integrated PHY 80ddd8a080SPrabhakar Kushwaha - Enhanced secure digital host controller (eSDXC/eMMC) 81ddd8a080SPrabhakar Kushwaha - Serial peripheral interface (SPI) controller 82ddd8a080SPrabhakar Kushwaha - Quad Serial Peripheral Interface (QSPI) Controller 83ddd8a080SPrabhakar Kushwaha - Four I2C controllers 84ddd8a080SPrabhakar Kushwaha - Two DUARTs 85ddd8a080SPrabhakar Kushwaha - Integrated flash controller (IFC 2.0) supporting NAND and NOR flash 86ddd8a080SPrabhakar Kushwaha - Support for hardware virtualization and partitioning enforcement 87ddd8a080SPrabhakar Kushwaha - QorIQ platform's trust architecture 3.0 88ddd8a080SPrabhakar Kushwaha - Service processor (SP) provides pre-boot initialization and secure-boot 89ddd8a080SPrabhakar Kushwaha capabilities 90b7f2bbffSPrabhakar Kushwaha 91b7f2bbffSPrabhakar KushwahaLS1012A 92b7f2bbffSPrabhakar Kushwaha-------- 93b7f2bbffSPrabhakar KushwahaThe LS1012A features an advanced 64-bit ARM v8 Cortex- 94b7f2bbffSPrabhakar KushwahaA53 processor, with 32 KB of parity protected L1-I cache, 95b7f2bbffSPrabhakar Kushwaha32 KB of ECC protected L1-D cache, as well as 256 KB of 96b7f2bbffSPrabhakar KushwahaECC protected L2 cache. 97b7f2bbffSPrabhakar Kushwaha 98b7f2bbffSPrabhakar KushwahaThe LS1012A SoC includes the following function and features: 99b7f2bbffSPrabhakar Kushwaha - One 64-bit ARM v8 Cortex-A53 core with the following capabilities: 100b7f2bbffSPrabhakar Kushwaha - ARM v8 cryptography extensions 101b7f2bbffSPrabhakar Kushwaha - One 16-bit DDR3L SDRAM memory controller, Up to 1.0 GT/s, Supports 102b7f2bbffSPrabhakar Kushwaha 16-/8-bit operation (no ECC support) 103b7f2bbffSPrabhakar Kushwaha - ARM core-link CCI-400 cache coherent interconnect 104b7f2bbffSPrabhakar Kushwaha - Packet Forwarding Engine (PFE) 105b7f2bbffSPrabhakar Kushwaha - Cryptography acceleration (SEC) 106b7f2bbffSPrabhakar Kushwaha - Ethernet interfaces supported by PFE: 107b7f2bbffSPrabhakar Kushwaha - One Configurable x3 SerDes: 108b7f2bbffSPrabhakar Kushwaha Two Serdes PLLs supported for usage by any SerDes data lane 109b7f2bbffSPrabhakar Kushwaha Support for up to 6 GBaud operation 110b7f2bbffSPrabhakar Kushwaha - High-speed peripheral interfaces: 111b7f2bbffSPrabhakar Kushwaha - One PCI Express Gen2 controller, supporting x1 operation 112b7f2bbffSPrabhakar Kushwaha - One serial ATA (SATA Gen 3.0) controller 113b7f2bbffSPrabhakar Kushwaha - One USB 3.0/2.0 controller with integrated PHY 114b7f2bbffSPrabhakar Kushwaha - One USB 2.0 controller with ULPI interface. . 115b7f2bbffSPrabhakar Kushwaha - Additional peripheral interfaces: 116b7f2bbffSPrabhakar Kushwaha - One quad serial peripheral interface (QuadSPI) controller 117b7f2bbffSPrabhakar Kushwaha - One serial peripheral interface (SPI) controller 118b7f2bbffSPrabhakar Kushwaha - Two enhanced secure digital host controllers 119b7f2bbffSPrabhakar Kushwaha - Two I2C controllers 120b7f2bbffSPrabhakar Kushwaha - One 16550 compliant DUART (two UART interfaces) 121b7f2bbffSPrabhakar Kushwaha - Two general purpose IOs (GPIO) 122b7f2bbffSPrabhakar Kushwaha - Two FlexTimers 123b7f2bbffSPrabhakar Kushwaha - Five synchronous audio interfaces (SAI) 124b7f2bbffSPrabhakar Kushwaha - Pre-boot loader (PBL) provides pre-boot initialization and RCW loading 125b7f2bbffSPrabhakar Kushwaha - Single-source clocking solution enabling generation of core, platform, 126b7f2bbffSPrabhakar Kushwaha DDR, SerDes, and USB clocks from a single external crystal and internal 127b7f2bbffSPrabhakar Kushwaha crystaloscillator 128b7f2bbffSPrabhakar Kushwaha - Thermal monitor unit (TMU) with +/- 3C accuracy 129b7f2bbffSPrabhakar Kushwaha - Two WatchDog timers 130b7f2bbffSPrabhakar Kushwaha - ARM generic timer 131b7f2bbffSPrabhakar Kushwaha - QorIQ platform's trust architecture 2.1 132b528b937SMingkai Hu 133b528b937SMingkai HuLS1046A 134b528b937SMingkai Hu-------- 135b528b937SMingkai HuThe LS1046A integrated multicore processor combines four ARM Cortex-A72 136b528b937SMingkai Huprocessor cores with datapath acceleration optimized for L2/3 packet 137b528b937SMingkai Huprocessing, single pass security offload and robust traffic management 138b528b937SMingkai Huand quality of service. 139b528b937SMingkai Hu 140b528b937SMingkai HuThe LS1046A SoC includes the following function and features: 141b528b937SMingkai Hu - Four 64-bit ARM Cortex-A72 CPUs 142b528b937SMingkai Hu - 2 MB unified L2 Cache 143b528b937SMingkai Hu - One 64-bit DDR4 SDRAM memory controllers with ECC and interleaving 144b528b937SMingkai Hu support 145b528b937SMingkai Hu - Data Path Acceleration Architecture (DPAA) incorporating acceleration the 146b528b937SMingkai Hu the following functions: 147b528b937SMingkai Hu - Packet parsing, classification, and distribution (FMan) 148b528b937SMingkai Hu - Queue management for scheduling, packet sequencing, and congestion 149b528b937SMingkai Hu management (QMan) 150b528b937SMingkai Hu - Hardware buffer management for buffer allocation and de-allocation (BMan) 151b528b937SMingkai Hu - Cryptography acceleration (SEC) 152b528b937SMingkai Hu - Two Configurable x4 SerDes 153b528b937SMingkai Hu - Two PLLs per four-lane SerDes 154b528b937SMingkai Hu - Support for 10G operation 155b528b937SMingkai Hu - Ethernet interfaces by FMan 156b528b937SMingkai Hu - Up to 2 x XFI supporting 10G interface (MAC 9, 10) 157b528b937SMingkai Hu - Up to 1 x QSGMII (MAC 5, 6, 10, 1) 158b528b937SMingkai Hu - Up to 4 x SGMII supporting 1000Mbps (MAC 5, 6, 9, 10) 159b528b937SMingkai Hu - Up to 3 x SGMII supporting 2500Mbps (MAC 5, 9, 10) 160b528b937SMingkai Hu - Up to 2 x RGMII supporting 1000Mbps (MAC 3, 4) 161b528b937SMingkai Hu - High-speed peripheral interfaces 162b528b937SMingkai Hu - Three PCIe 3.0 controllers, one supporting x4 operation 163b528b937SMingkai Hu - One serial ATA (SATA 3.0) controllers 164b528b937SMingkai Hu - Additional peripheral interfaces 165b528b937SMingkai Hu - Three high-speed USB 3.0 controllers with integrated PHY 166b528b937SMingkai Hu - Enhanced secure digital host controller (eSDXC/eMMC) 167b528b937SMingkai Hu - Quad Serial Peripheral Interface (QSPI) Controller 168b528b937SMingkai Hu - Serial peripheral interface (SPI) controller 169b528b937SMingkai Hu - Four I2C controllers 170b528b937SMingkai Hu - Two DUARTs 171b528b937SMingkai Hu - Integrated flash controller (IFC) supporting NAND and NOR flash 172b528b937SMingkai Hu - QorIQ platform's trust architecture 2.1 173*9ae836cdSPriyanka Jain 174*9ae836cdSPriyanka JainLS2088A 175*9ae836cdSPriyanka Jain-------- 176*9ae836cdSPriyanka JainThe LS2088A integrated multicore processor combines eight ARM Cortex-A72 177*9ae836cdSPriyanka Jainprocessor cores with high-performance data path acceleration logic and network 178*9ae836cdSPriyanka Jainand peripheral bus interfaces required for networking, telecom/datacom, 179*9ae836cdSPriyanka Jainwireless infrastructure, and mil/aerospace applications. 180*9ae836cdSPriyanka Jain 181*9ae836cdSPriyanka JainThe LS2088A SoC includes the following function and features: 182*9ae836cdSPriyanka Jain 183*9ae836cdSPriyanka Jain - Eight 64-bit ARM Cortex-A72 CPUs 184*9ae836cdSPriyanka Jain - 1 MB platform cache with ECC 185*9ae836cdSPriyanka Jain - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support 186*9ae836cdSPriyanka Jain - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by 187*9ae836cdSPriyanka Jain the AIOP 188*9ae836cdSPriyanka Jain - Data path acceleration architecture (DPAA2) incorporating acceleration for 189*9ae836cdSPriyanka Jain the following functions: 190*9ae836cdSPriyanka Jain - Packet parsing, classification, and distribution (WRIOP) 191*9ae836cdSPriyanka Jain - Queue and Hardware buffer management for scheduling, packet sequencing, and 192*9ae836cdSPriyanka Jain congestion management, buffer allocation and de-allocation (QBMan) 193*9ae836cdSPriyanka Jain - Cryptography acceleration (SEC) at up to 10 Gbps 194*9ae836cdSPriyanka Jain - RegEx pattern matching acceleration (PME) at up to 10 Gbps 195*9ae836cdSPriyanka Jain - Decompression/compression acceleration (DCE) at up to 20 Gbps 196*9ae836cdSPriyanka Jain - Accelerated I/O processing (AIOP) at up to 20 Gbps 197*9ae836cdSPriyanka Jain - QDMA engine 198*9ae836cdSPriyanka Jain - 16 SerDes lanes at up to 10.3125 GHz 199*9ae836cdSPriyanka Jain - Ethernet interfaces 200*9ae836cdSPriyanka Jain - Up to eight 10 Gbps Ethernet MACs 201*9ae836cdSPriyanka Jain - Up to eight 1 / 2.5 Gbps Ethernet MACs 202*9ae836cdSPriyanka Jain - High-speed peripheral interfaces 203*9ae836cdSPriyanka Jain - Four PCIe 3.0 controllers, one supporting SR-IOV 204*9ae836cdSPriyanka Jain - Additional peripheral interfaces 205*9ae836cdSPriyanka Jain - Two serial ATA (SATA 3.0) controllers 206*9ae836cdSPriyanka Jain - Two high-speed USB 3.0 controllers with integrated PHY 207*9ae836cdSPriyanka Jain - Enhanced secure digital host controller (eSDXC/eMMC) 208*9ae836cdSPriyanka Jain - Serial peripheral interface (SPI) controller 209*9ae836cdSPriyanka Jain - Quad Serial Peripheral Interface (QSPI) Controller 210*9ae836cdSPriyanka Jain - Four I2C controllers 211*9ae836cdSPriyanka Jain - Two DUARTs 212*9ae836cdSPriyanka Jain - Integrated flash controller (IFC 2.0) supporting NAND and NOR flash 213*9ae836cdSPriyanka Jain - Support for hardware virtualization and partitioning enforcement 214*9ae836cdSPriyanka Jain - QorIQ platform's trust architecture 3.0 215*9ae836cdSPriyanka Jain - Service processor (SP) provides pre-boot initialization and secure-boot 216*9ae836cdSPriyanka Jain capabilities 217*9ae836cdSPriyanka Jain 218*9ae836cdSPriyanka JainLS2088A SoC has 3 more similar SoC personalities 219*9ae836cdSPriyanka Jain1)LS2048A, few difference w.r.t. LS2088A: 220*9ae836cdSPriyanka Jain a) Four 64-bit ARM v8 Cortex-A72 CPUs 221*9ae836cdSPriyanka Jain 222*9ae836cdSPriyanka Jain2)LS2084A, few difference w.r.t. LS2088A: 223*9ae836cdSPriyanka Jain a) No AIOP 224*9ae836cdSPriyanka Jain b) No 32-bit DDR3 SDRAM memory 225*9ae836cdSPriyanka Jain c) 5 * 1/10G + 5 *1G WRIOP 226*9ae836cdSPriyanka Jain d) No L2 switch 227*9ae836cdSPriyanka Jain 228*9ae836cdSPriyanka Jain3)LS2044A, few difference w.r.t. LS2084A: 229*9ae836cdSPriyanka Jain a) Four 64-bit ARM v8 Cortex-A72 CPUs 230