1Core instruction prefetch disable
2---------------------------------
3To disable instruction prefetch of core; hwconfig needs to be updated.
4for e.g.
5setenv hwconfig 'fsl_ddr:bank_intlv=auto;core_prefetch:disable=0x02'
6
7Here 0x02 can be replaced with any valid value except Mask[0] bit. It
8represents 64 bit mask. The 64-bit Mask has one bit for each core.
9Mask[0] = core0
10Mask[1] = core1
11Mask[2] = core2
12etc
13If the bit is set ('b1) in the mask, then prefetch is disabled for
14that core when it is released from reset.
15
16core0 prefetch should not be disabled i.e. Mask[0] should never be set.
17Setting Mask[0] may lead to undefined behavior.
18
19Once disabled, prefetch remains disabled until the next reset.
20There is no function to re-enable prefetch.
21