1if ARM64 2 3config ARMV8_MULTIENTRY 4 bool "Enable multiple CPUs to enter into U-Boot" 5 6config ARMV8_SPIN_TABLE 7 bool "Support spin-table enable method" 8 depends on ARMV8_MULTIENTRY && OF_LIBFDT 9 help 10 Say Y here to support "spin-table" enable method for booting Linux. 11 12 To use this feature, you must do: 13 - Specify enable-method = "spin-table" in each CPU node in the 14 Device Tree you are using to boot the kernel 15 - Let secondary CPUs in U-Boot (in a board specific manner) 16 before the master CPU jumps to the kernel 17 18 U-Boot automatically does: 19 - Set "cpu-release-addr" property of each CPU node 20 (overwrites it if already exists). 21 - Reserve the code for the spin-table and the release address 22 via a /memreserve/ region in the Device Tree. 23 24config PSCI_RESET 25 bool "Use PSCI for reset and shutdown" 26 default y 27 depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \ 28 !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \ 29 !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \ 30 !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ 31 !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ 32 !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ 33 !ARCH_UNIPHIER && !ARCH_SNAPDRAGON && !TARGET_S32V234EVB 34 help 35 Most armv8 systems have PSCI support enabled in EL3, either through 36 ARM Trusted Firmware or other firmware. 37 38 On these systems, we do not need to implement system reset manually, 39 but can instead rely on higher level firmware to deal with it. 40 41 Select Y here to make use of PSCI calls for system reset 42 43config ARMV8_PSCI 44 bool "Enable PSCI support" if EXPERT 45 default n 46 help 47 PSCI is Power State Coordination Interface defined by ARM. 48 The PSCI in U-boot provides a general framework and each platform 49 can implement their own specific PSCI functions. 50 Say Y here to enable PSCI support on ARMv8 platform. 51 52config ARMV8_PSCI_NR_CPUS 53 int "Maximum supported CPUs for PSCI" 54 depends on ARMV8_PSCI 55 default 4 56 help 57 The maximum number of CPUs supported in the PSCI firmware. 58 It is no problem to set a larger value than the number of CPUs in 59 the actual hardware implementation. 60 61config ARMV8_PSCI_CPUS_PER_CLUSTER 62 int "Number of CPUs per cluster" 63 depends on ARMV8_PSCI 64 default 0 65 help 66 The number of CPUs per cluster, suppose each cluster has same number 67 of CPU cores, platforms with asymmetric clusters don't apply here. 68 A value 0 or no definition of it works for single cluster system. 69 System with multi-cluster should difine their own exact value. 70 71if SYS_HAS_ARMV8_SECURE_BASE 72 73config ARMV8_SECURE_BASE 74 hex "Secure address for PSCI image" 75 depends on ARMV8_PSCI 76 help 77 Address for placing the PSCI text, data and stack sections. 78 If not defined, the PSCI sections are placed together with the u-boot 79 but platform can choose to place PSCI code image separately in other 80 places such as some secure RAM built-in SOC etc. 81 82endif 83 84endif 85