xref: /openbmc/u-boot/arch/arm/cpu/armv7/syslib.c (revision 425faf74)
1 /*
2  * (C) Copyright 2008
3  * Texas Instruments, <www.ti.com>
4  *
5  * Richard Woodruff <r-woodruff2@ti.com>
6  * Syed Mohammed Khasim <khasim@ti.com>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #include <common.h>
12 #include <asm/io.h>
13 
14 /************************************************************
15  * sdelay() - simple spin loop.  Will be constant time as
16  *  its generally used in bypass conditions only.  This
17  *  is necessary until timers are accessible.
18  *
19  *  not inline to increase chances its in cache when called
20  *************************************************************/
21 void sdelay(unsigned long loops)
22 {
23 	__asm__ volatile ("1:\n" "subs %0, %1, #1\n"
24 			  "bne 1b":"=r" (loops):"0"(loops));
25 }
26 
27 /*****************************************************************
28  * sr32 - clear & set a value in a bit range for a 32 bit address
29  *****************************************************************/
30 void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value)
31 {
32 	u32 tmp, msk = 0;
33 	msk = 1 << num_bits;
34 	--msk;
35 	tmp = readl((u32)addr) & ~(msk << start_bit);
36 	tmp |= value << start_bit;
37 	writel(tmp, (u32)addr);
38 }
39 
40 /*********************************************************************
41  * wait_on_value() - common routine to allow waiting for changes in
42  *   volatile regs.
43  *********************************************************************/
44 u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,
45 		  u32 bound)
46 {
47 	u32 i = 0, val;
48 	do {
49 		++i;
50 		val = readl((u32)read_addr) & read_bit_mask;
51 		if (val == match_value)
52 			return 1;
53 		if (i == bound)
54 			return 0;
55 	} while (1);
56 }
57