1 /* 2 * (C) Copyright 2007-2011 3 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 4 * Tom Cubie <tangliang@allwinnertech.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <common.h> 10 #include <asm/io.h> 11 #include <asm/arch/timer.h> 12 13 DECLARE_GLOBAL_DATA_PTR; 14 15 #define TIMER_MODE (0x0 << 7) /* continuous mode */ 16 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ 17 #define TIMER_SRC (0x1 << 2) /* osc24m */ 18 #define TIMER_RELOAD (0x1 << 1) /* reload internal value */ 19 #define TIMER_EN (0x1 << 0) /* enable timer */ 20 21 #define TIMER_CLOCK (24 * 1000 * 1000) 22 #define COUNT_TO_USEC(x) ((x) / 24) 23 #define USEC_TO_COUNT(x) ((x) * 24) 24 #define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ) 25 #define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ) 26 27 #define TIMER_LOAD_VAL 0xffffffff 28 29 #define TIMER_NUM 0 /* we use timer 0 */ 30 31 /* read the 32-bit timer */ 32 static ulong read_timer(void) 33 { 34 struct sunxi_timer_reg *timers = 35 (struct sunxi_timer_reg *)SUNXI_TIMER_BASE; 36 struct sunxi_timer *timer = &timers->timer[TIMER_NUM]; 37 38 /* 39 * The hardware timer counts down, therefore we invert to 40 * produce an incrementing timer. 41 */ 42 return ~readl(&timer->val); 43 } 44 45 /* init timer register */ 46 int timer_init(void) 47 { 48 struct sunxi_timer_reg *timers = 49 (struct sunxi_timer_reg *)SUNXI_TIMER_BASE; 50 struct sunxi_timer *timer = &timers->timer[TIMER_NUM]; 51 writel(TIMER_LOAD_VAL, &timer->inter); 52 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, 53 &timer->ctl); 54 55 return 0; 56 } 57 58 /* timer without interrupts */ 59 ulong get_timer(ulong base) 60 { 61 return get_timer_masked() - base; 62 } 63 64 ulong get_timer_masked(void) 65 { 66 /* current tick value */ 67 ulong now = TICKS_TO_HZ(read_timer()); 68 69 if (now >= gd->arch.lastinc) /* normal (non rollover) */ 70 gd->arch.tbl += (now - gd->arch.lastinc); 71 else { 72 /* rollover */ 73 gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) 74 - gd->arch.lastinc) + now; 75 } 76 gd->arch.lastinc = now; 77 78 return gd->arch.tbl; 79 } 80 81 /* delay x useconds */ 82 void __udelay(unsigned long usec) 83 { 84 long tmo = USEC_TO_COUNT(usec); 85 ulong now, last = read_timer(); 86 87 while (tmo > 0) { 88 now = read_timer(); 89 if (now > last) /* normal (non rollover) */ 90 tmo -= now - last; 91 else /* rollover */ 92 tmo -= TIMER_LOAD_VAL - last + now; 93 last = now; 94 } 95 } 96 97 /* 98 * This function is derived from PowerPC code (read timebase as long long). 99 * On ARM it just returns the timer value. 100 */ 101 unsigned long long get_ticks(void) 102 { 103 return get_timer(0); 104 } 105 106 /* 107 * This function is derived from PowerPC code (timebase clock frequency). 108 * On ARM it returns the number of timer ticks per second. 109 */ 110 ulong get_tbclk(void) 111 { 112 return CONFIG_SYS_HZ; 113 } 114