xref: /openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/timer.c (revision 29b103c7)
1 /*
2  * Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/io.h>
9 #include <div64.h>
10 #include <asm/arch/immap_ls102xa.h>
11 #include <asm/arch/clock.h>
12 
13 DECLARE_GLOBAL_DATA_PTR;
14 
15 /*
16  * This function is intended for SHORT delays only.
17  * It will overflow at around 10 seconds @ 400MHz,
18  * or 20 seconds @ 200MHz.
19  */
20 unsigned long usec2ticks(unsigned long usec)
21 {
22 	ulong ticks;
23 
24 	if (usec < 1000)
25 		ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
26 	else
27 		ticks = ((usec / 10) * (get_tbclk() / 100000));
28 
29 	return ticks;
30 }
31 
32 static inline unsigned long long tick_to_time(unsigned long long tick)
33 {
34 	unsigned long freq;
35 
36 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
37 
38 	tick *= CONFIG_SYS_HZ;
39 	do_div(tick, freq);
40 
41 	return tick;
42 }
43 
44 static inline unsigned long long us_to_tick(unsigned long long usec)
45 {
46 	unsigned long freq;
47 
48 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
49 
50 	usec = usec * freq  + 999999;
51 	do_div(usec, 1000000);
52 
53 	return usec;
54 }
55 
56 int timer_init(void)
57 {
58 	struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
59 	unsigned long ctrl, val, freq;
60 
61 	/* Enable System Counter */
62 	writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
63 
64 	freq = GENERIC_TIMER_CLK;
65 	asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
66 
67 	/* Set PL1 Physical Timer Ctrl */
68 	ctrl = ARCH_TIMER_CTRL_ENABLE;
69 	asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl));
70 
71 	/* Set PL1 Physical Comp Value */
72 	val = TIMER_COMP_VAL;
73 	asm("mcrr p15, 2, %Q0, %R0, c14" : : "r" (val));
74 
75 	gd->arch.tbl = 0;
76 	gd->arch.tbu = 0;
77 
78 	return 0;
79 }
80 
81 unsigned long long get_ticks(void)
82 {
83 	unsigned long long now;
84 
85 	asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
86 
87 	gd->arch.tbl = (unsigned long)(now & 0xffffffff);
88 	gd->arch.tbu = (unsigned long)(now >> 32);
89 
90 	return now;
91 }
92 
93 unsigned long get_timer_masked(void)
94 {
95 	return tick_to_time(get_ticks());
96 }
97 
98 unsigned long get_timer(ulong base)
99 {
100 	return get_timer_masked() - base;
101 }
102 
103 /* delay x useconds and preserve advance timstamp value */
104 void __udelay(unsigned long usec)
105 {
106 	unsigned long long start;
107 	unsigned long tmo;
108 
109 	start = get_ticks();			/* get current timestamp */
110 	tmo = us_to_tick(usec);			/* convert usecs to ticks */
111 
112 	while ((get_ticks() - start) < tmo)
113 		;				/* loop till time has passed */
114 }
115 
116 /*
117  * This function is derived from PowerPC code (timebase clock frequency).
118  * On ARM it returns the number of timer ticks per second.
119  */
120 unsigned long get_tbclk(void)
121 {
122 	unsigned long freq;
123 
124 	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
125 
126 	return freq;
127 }
128