1 /*
2  * Copyright 2014 Broadcom Corporation.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <div64.h>
9 #include <asm/io.h>
10 #include <asm/iproc-common/timer.h>
11 #include <asm/iproc-common/sysmap.h>
12 
13 static inline uint64_t timer_global_read(void)
14 {
15 	uint64_t cur_tick;
16 	uint32_t count_h;
17 	uint32_t count_l;
18 
19 	do {
20 		count_h = readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
21 				TIMER_GLB_HI_OFFSET);
22 		count_l = readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
23 				TIMER_GLB_LOW_OFFSET);
24 		cur_tick = readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
25 				 TIMER_GLB_HI_OFFSET);
26 	} while (cur_tick != count_h);
27 
28 	return (cur_tick << 32) + count_l;
29 }
30 
31 void timer_global_init(void)
32 {
33 	writel(0, IPROC_PERIPH_GLB_TIM_REG_BASE + TIMER_GLB_CTRL_OFFSET);
34 	writel(0, IPROC_PERIPH_GLB_TIM_REG_BASE + TIMER_GLB_LOW_OFFSET);
35 	writel(0, IPROC_PERIPH_GLB_TIM_REG_BASE + TIMER_GLB_HI_OFFSET);
36 	writel(TIMER_GLB_TIM_CTRL_TIM_EN,
37 	       IPROC_PERIPH_GLB_TIM_REG_BASE + TIMER_GLB_CTRL_OFFSET);
38 }
39 
40 int timer_init(void)
41 {
42 	timer_global_init();
43 	return 0;
44 }
45 
46 unsigned long get_timer(unsigned long base)
47 {
48 	uint64_t count;
49 	uint64_t ret;
50 	uint64_t tim_clk;
51 	uint64_t periph_clk;
52 
53 	count = timer_global_read();
54 
55 	/* default arm clk is 1GHz, periph_clk=arm_clk/2, tick per msec */
56 	periph_clk = 500000;
57 	tim_clk = lldiv(periph_clk,
58 			(((readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
59 				 TIMER_GLB_CTRL_OFFSET) &
60 			TIMER_GLB_TIM_CTRL_PRESC_MASK) >> 8) + 1));
61 
62 	ret = lldiv(count, (uint32_t)tim_clk);
63 
64 	/* returns msec */
65 	return ret - base;
66 }
67 
68 void __udelay(unsigned long usec)
69 {
70 	uint64_t cur_tick, end_tick;
71 	uint64_t tim_clk;
72 	uint64_t periph_clk;
73 
74 	/* default arm clk is 1GHz, periph_clk=arm_clk/2, tick per usec */
75 	periph_clk = 500;
76 
77 	tim_clk = lldiv(periph_clk,
78 			(((readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
79 				 TIMER_GLB_CTRL_OFFSET) &
80 			TIMER_GLB_TIM_CTRL_PRESC_MASK) >> 8) + 1));
81 
82 	cur_tick = timer_global_read();
83 
84 	end_tick = tim_clk;
85 	end_tick *= usec;
86 	end_tick += cur_tick;
87 
88 	do {
89 		cur_tick = timer_global_read();
90 
91 	} while (cur_tick < end_tick);
92 }
93 
94 void timer_systick_init(uint32_t tick_ms)
95 {
96 	/* Disable timer and clear interrupt status*/
97 	writel(0, IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_CTRL_OFFSET);
98 	writel(TIMER_PVT_TIM_INT_STATUS_SET,
99 	       IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_STATUS_OFFSET);
100 	writel((PLL_AXI_CLK/1000) * tick_ms,
101 	       IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_LOAD_OFFSET);
102 	writel(TIMER_PVT_TIM_CTRL_INT_EN |
103 	       TIMER_PVT_TIM_CTRL_AUTO_RELD |
104 	       TIMER_PVT_TIM_CTRL_TIM_EN,
105 	       IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_CTRL_OFFSET);
106 }
107 
108 void timer_systick_isr(void *data)
109 {
110 	writel(TIMER_PVT_TIM_INT_STATUS_SET,
111 	       IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_STATUS_OFFSET);
112 }
113 
114 /*
115  * This function is derived from PowerPC code (read timebase as long long).
116  * On ARM it just returns the timer value in msec.
117  */
118 unsigned long long get_ticks(void)
119 {
120 	return get_timer(0);
121 }
122 
123 /*
124  * This is used in conjuction with get_ticks, which returns msec as ticks.
125  * Here we just return ticks/sec = msec/sec = 1000
126  */
127 ulong get_tbclk(void)
128 {
129 	return 1000;
130 }
131