xref: /openbmc/u-boot/arch/arm/cpu/armv7/cpu.c (revision efc05ae1)
1 /*
2  * (C) Copyright 2008 Texas Insturments
3  *
4  * (C) Copyright 2002
5  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6  * Marius Groeger <mgroeger@sysgo.de>
7  *
8  * (C) Copyright 2002
9  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
10  *
11  * See file CREDITS for list of people who contributed to this
12  * project.
13  *
14  * This program is free software; you can redistribute it and/or
15  * modify it under the terms of the GNU General Public License as
16  * published by the Free Software Foundation; either version 2 of
17  * the License, or (at your option) any later version.
18  *
19  * This program is distributed in the hope that it will be useful,
20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22  * GNU General Public License for more details.
23  *
24  * You should have received a copy of the GNU General Public License
25  * along with this program; if not, write to the Free Software
26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27  * MA 02111-1307 USA
28  */
29 
30 /*
31  * CPU specific code
32  */
33 
34 #include <common.h>
35 #include <command.h>
36 #include <asm/system.h>
37 #include <asm/cache.h>
38 #ifndef CONFIG_L2_OFF
39 #include <asm/arch/sys_proto.h>
40 #endif
41 
42 static void cache_flush(void);
43 
44 int cleanup_before_linux(void)
45 {
46 	unsigned int i;
47 
48 	/*
49 	 * this function is called just before we call linux
50 	 * it prepares the processor for linux
51 	 *
52 	 * we turn off caches etc ...
53 	 */
54 	disable_interrupts();
55 
56 	/* turn off I/D-cache */
57 	icache_disable();
58 	dcache_disable();
59 
60 	/* invalidate I-cache */
61 	cache_flush();
62 
63 #ifndef CONFIG_L2_OFF
64 	/* turn off L2 cache */
65 	l2_cache_disable();
66 	/* invalidate L2 cache also */
67 	invalidate_dcache(get_device_type());
68 #endif
69 	i = 0;
70 	/* mem barrier to sync up things */
71 	asm("mcr p15, 0, %0, c7, c10, 4": :"r"(i));
72 
73 #ifndef CONFIG_L2_OFF
74 	l2_cache_enable();
75 #endif
76 
77 	return 0;
78 }
79 
80 static void cache_flush(void)
81 {
82 	asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));
83 }
84