1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2008 Texas Insturments 4 * 5 * (C) Copyright 2002 6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 7 * Marius Groeger <mgroeger@sysgo.de> 8 * 9 * (C) Copyright 2002 10 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 11 */ 12 13 /* 14 * CPU specific code 15 */ 16 17 #include <common.h> 18 #include <command.h> 19 #include <asm/system.h> 20 #include <asm/cache.h> 21 #include <asm/armv7.h> 22 #include <linux/compiler.h> 23 24 void __weak cpu_cache_initialization(void){} 25 26 int cleanup_before_linux_select(int flags) 27 { 28 /* 29 * this function is called just before we call linux 30 * it prepares the processor for linux 31 * 32 * we turn off caches etc ... 33 */ 34 #ifndef CONFIG_SPL_BUILD 35 disable_interrupts(); 36 #endif 37 38 if (flags & CBL_DISABLE_CACHES) { 39 /* 40 * turn off D-cache 41 * dcache_disable() in turn flushes the d-cache and disables MMU 42 */ 43 dcache_disable(); 44 v7_outer_cache_disable(); 45 46 /* 47 * After D-cache is flushed and before it is disabled there may 48 * be some new valid entries brought into the cache. We are 49 * sure that these lines are not dirty and will not affect our 50 * execution. (because unwinding the call-stack and setting a 51 * bit in CP15 SCTRL is all we did during this. We have not 52 * pushed anything on to the stack. Neither have we affected 53 * any static data) So just invalidate the entire d-cache again 54 * to avoid coherency problems for kernel 55 */ 56 invalidate_dcache_all(); 57 58 icache_disable(); 59 invalidate_icache_all(); 60 } else { 61 /* 62 * Turn off I-cache and invalidate it 63 */ 64 icache_disable(); 65 invalidate_icache_all(); 66 67 flush_dcache_all(); 68 invalidate_icache_all(); 69 icache_enable(); 70 } 71 72 /* 73 * Some CPU need more cache attention before starting the kernel. 74 */ 75 cpu_cache_initialization(); 76 77 return 0; 78 } 79 80 int cleanup_before_linux(void) 81 { 82 return cleanup_before_linux_select(CBL_ALL); 83 } 84