1 /* 2 * (C) Copyright 2008 Texas Insturments 3 * 4 * (C) Copyright 2002 5 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 6 * Marius Groeger <mgroeger@sysgo.de> 7 * 8 * (C) Copyright 2002 9 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 14 /* 15 * CPU specific code 16 */ 17 18 #include <common.h> 19 #include <command.h> 20 #include <asm/system.h> 21 #include <asm/cache.h> 22 #include <asm/armv7.h> 23 #include <linux/compiler.h> 24 25 void __weak cpu_cache_initialization(void){} 26 27 int cleanup_before_linux_select(int flags) 28 { 29 /* 30 * this function is called just before we call linux 31 * it prepares the processor for linux 32 * 33 * we turn off caches etc ... 34 */ 35 #ifndef CONFIG_SPL_BUILD 36 disable_interrupts(); 37 #endif 38 39 /* 40 * Turn off I-cache and invalidate it 41 */ 42 icache_disable(); 43 invalidate_icache_all(); 44 45 if (flags & CBL_DISABLE_CACHES) { 46 /* 47 * turn off D-cache 48 * dcache_disable() in turn flushes the d-cache and disables MMU 49 */ 50 dcache_disable(); 51 v7_outer_cache_disable(); 52 53 /* 54 * After D-cache is flushed and before it is disabled there may 55 * be some new valid entries brought into the cache. We are 56 * sure that these lines are not dirty and will not affect our 57 * execution. (because unwinding the call-stack and setting a 58 * bit in CP15 SCTRL is all we did during this. We have not 59 * pushed anything on to the stack. Neither have we affected 60 * any static data) So just invalidate the entire d-cache again 61 * to avoid coherency problems for kernel 62 */ 63 invalidate_dcache_all(); 64 } else { 65 flush_dcache_all(); 66 invalidate_icache_all(); 67 icache_enable(); 68 } 69 70 /* 71 * Some CPU need more cache attention before starting the kernel. 72 */ 73 cpu_cache_initialization(); 74 75 return 0; 76 } 77 78 int cleanup_before_linux(void) 79 { 80 return cleanup_before_linux_select(CBL_ALL); 81 } 82