xref: /openbmc/u-boot/arch/arm/cpu/armv7/cpu.c (revision 00a2749d)
1 /*
2  * (C) Copyright 2008 Texas Insturments
3  *
4  * (C) Copyright 2002
5  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6  * Marius Groeger <mgroeger@sysgo.de>
7  *
8  * (C) Copyright 2002
9  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
10  *
11  * See file CREDITS for list of people who contributed to this
12  * project.
13  *
14  * This program is free software; you can redistribute it and/or
15  * modify it under the terms of the GNU General Public License as
16  * published by the Free Software Foundation; either version 2 of
17  * the License, or (at your option) any later version.
18  *
19  * This program is distributed in the hope that it will be useful,
20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22  * GNU General Public License for more details.
23  *
24  * You should have received a copy of the GNU General Public License
25  * along with this program; if not, write to the Free Software
26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27  * MA 02111-1307 USA
28  */
29 
30 /*
31  * CPU specific code
32  */
33 
34 #include <common.h>
35 #include <command.h>
36 #include <asm/system.h>
37 #include <asm/cache.h>
38 #include <asm/armv7.h>
39 #include <linux/compiler.h>
40 
41 void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
42 {
43 }
44 
45 void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
46 	__attribute__((weak, alias("save_boot_params_default")));
47 
48 void __weak cpu_cache_initialization(void){}
49 
50 int cleanup_before_linux(void)
51 {
52 	/*
53 	 * this function is called just before we call linux
54 	 * it prepares the processor for linux
55 	 *
56 	 * we turn off caches etc ...
57 	 */
58 #ifndef CONFIG_SPL_BUILD
59 	disable_interrupts();
60 #endif
61 
62 	/*
63 	 * Turn off I-cache and invalidate it
64 	 */
65 	icache_disable();
66 	invalidate_icache_all();
67 
68 	/*
69 	 * turn off D-cache
70 	 * dcache_disable() in turn flushes the d-cache and disables MMU
71 	 */
72 	dcache_disable();
73 	v7_outer_cache_disable();
74 
75 	/*
76 	 * After D-cache is flushed and before it is disabled there may
77 	 * be some new valid entries brought into the cache. We are sure
78 	 * that these lines are not dirty and will not affect our execution.
79 	 * (because unwinding the call-stack and setting a bit in CP15 SCTRL
80 	 * is all we did during this. We have not pushed anything on to the
81 	 * stack. Neither have we affected any static data)
82 	 * So just invalidate the entire d-cache again to avoid coherency
83 	 * problems for kernel
84 	 */
85 	invalidate_dcache_all();
86 
87 	/*
88 	 * Some CPU need more cache attention before starting the kernel.
89 	 */
90 	cpu_cache_initialization();
91 
92 	return 0;
93 }
94