184ad6884SPeter Tyser/* 284ad6884SPeter Tyser * armboot - Startup Code for ARM926EJS CPU-core 384ad6884SPeter Tyser * 484ad6884SPeter Tyser * Copyright (c) 2003 Texas Instruments 584ad6884SPeter Tyser * 684ad6884SPeter Tyser * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ 784ad6884SPeter Tyser * 884ad6884SPeter Tyser * Copyright (c) 2001 Marius Gr�ger <mag@sysgo.de> 984ad6884SPeter Tyser * Copyright (c) 2002 Alex Z�pke <azu@sysgo.de> 1084ad6884SPeter Tyser * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 1184ad6884SPeter Tyser * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 1284ad6884SPeter Tyser * Copyright (c) 2003 Kshitij <kshitij@ti.com> 1392d5ecbaSAlbert Aribaud * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr> 1484ad6884SPeter Tyser * 1584ad6884SPeter Tyser * See file CREDITS for list of people who contributed to this 1684ad6884SPeter Tyser * project. 1784ad6884SPeter Tyser * 1884ad6884SPeter Tyser * This program is free software; you can redistribute it and/or 1984ad6884SPeter Tyser * modify it under the terms of the GNU General Public License as 2084ad6884SPeter Tyser * published by the Free Software Foundation; either version 2 of 2184ad6884SPeter Tyser * the License, or (at your option) any later version. 2284ad6884SPeter Tyser * 2384ad6884SPeter Tyser * This program is distributed in the hope that it will be useful, 2484ad6884SPeter Tyser * but WITHOUT ANY WARRANTY; without even the implied warranty of 2584ad6884SPeter Tyser * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2684ad6884SPeter Tyser * GNU General Public License for more details. 2784ad6884SPeter Tyser * 2884ad6884SPeter Tyser * You should have received a copy of the GNU General Public License 2984ad6884SPeter Tyser * along with this program; if not, write to the Free Software 3084ad6884SPeter Tyser * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 3184ad6884SPeter Tyser * MA 02111-1307 USA 3284ad6884SPeter Tyser */ 3384ad6884SPeter Tyser 3425ddd1fbSWolfgang Denk#include <asm-offsets.h> 3584ad6884SPeter Tyser#include <config.h> 3684ad6884SPeter Tyser#include <common.h> 3784ad6884SPeter Tyser#include <version.h> 3884ad6884SPeter Tyser 3984ad6884SPeter Tyser#if defined(CONFIG_OMAP1610) 4084ad6884SPeter Tyser#include <./configs/omap1510.h> 4184ad6884SPeter Tyser#elif defined(CONFIG_OMAP730) 4284ad6884SPeter Tyser#include <./configs/omap730.h> 4384ad6884SPeter Tyser#endif 4484ad6884SPeter Tyser 4584ad6884SPeter Tyser/* 4684ad6884SPeter Tyser ************************************************************************* 4784ad6884SPeter Tyser * 4884ad6884SPeter Tyser * Jump vector table as in table 3.1 in [1] 4984ad6884SPeter Tyser * 5084ad6884SPeter Tyser ************************************************************************* 5184ad6884SPeter Tyser */ 5284ad6884SPeter Tyser 5384ad6884SPeter Tyser 5484ad6884SPeter Tyser.globl _start 5584ad6884SPeter Tyser_start: 5684ad6884SPeter Tyser b reset 5784ad6884SPeter Tyser#ifdef CONFIG_PRELOADER 5884ad6884SPeter Tyser/* No exception handlers in preloader */ 5984ad6884SPeter Tyser ldr pc, _hang 6084ad6884SPeter Tyser ldr pc, _hang 6184ad6884SPeter Tyser ldr pc, _hang 6284ad6884SPeter Tyser ldr pc, _hang 6384ad6884SPeter Tyser ldr pc, _hang 6484ad6884SPeter Tyser ldr pc, _hang 6584ad6884SPeter Tyser ldr pc, _hang 6684ad6884SPeter Tyser 6784ad6884SPeter Tyser_hang: 6884ad6884SPeter Tyser .word do_hang 6984ad6884SPeter Tyser/* pad to 64 byte boundary */ 7084ad6884SPeter Tyser .word 0x12345678 7184ad6884SPeter Tyser .word 0x12345678 7284ad6884SPeter Tyser .word 0x12345678 7384ad6884SPeter Tyser .word 0x12345678 7484ad6884SPeter Tyser .word 0x12345678 7584ad6884SPeter Tyser .word 0x12345678 7684ad6884SPeter Tyser .word 0x12345678 7784ad6884SPeter Tyser#else 7884ad6884SPeter Tyser ldr pc, _undefined_instruction 7984ad6884SPeter Tyser ldr pc, _software_interrupt 8084ad6884SPeter Tyser ldr pc, _prefetch_abort 8184ad6884SPeter Tyser ldr pc, _data_abort 8284ad6884SPeter Tyser ldr pc, _not_used 8384ad6884SPeter Tyser ldr pc, _irq 8484ad6884SPeter Tyser ldr pc, _fiq 8584ad6884SPeter Tyser 8684ad6884SPeter Tyser_undefined_instruction: 8784ad6884SPeter Tyser .word undefined_instruction 8884ad6884SPeter Tyser_software_interrupt: 8984ad6884SPeter Tyser .word software_interrupt 9084ad6884SPeter Tyser_prefetch_abort: 9184ad6884SPeter Tyser .word prefetch_abort 9284ad6884SPeter Tyser_data_abort: 9384ad6884SPeter Tyser .word data_abort 9484ad6884SPeter Tyser_not_used: 9584ad6884SPeter Tyser .word not_used 9684ad6884SPeter Tyser_irq: 9784ad6884SPeter Tyser .word irq 9884ad6884SPeter Tyser_fiq: 9984ad6884SPeter Tyser .word fiq 10084ad6884SPeter Tyser 10184ad6884SPeter Tyser#endif /* CONFIG_PRELOADER */ 10284ad6884SPeter Tyser .balignl 16,0xdeadbeef 10384ad6884SPeter Tyser 10484ad6884SPeter Tyser 10584ad6884SPeter Tyser/* 10684ad6884SPeter Tyser ************************************************************************* 10784ad6884SPeter Tyser * 10884ad6884SPeter Tyser * Startup Code (reset vector) 10984ad6884SPeter Tyser * 11084ad6884SPeter Tyser * do important init only if we don't start from memory! 11184ad6884SPeter Tyser * setup Memory and board specific bits prior to relocation. 11284ad6884SPeter Tyser * relocate armboot to ram 11384ad6884SPeter Tyser * setup stack 11484ad6884SPeter Tyser * 11584ad6884SPeter Tyser ************************************************************************* 11684ad6884SPeter Tyser */ 11784ad6884SPeter Tyser 118ab86f72cSHeiko Schocher.globl _TEXT_BASE 11984ad6884SPeter Tyser_TEXT_BASE: 12014d0a02aSWolfgang Denk .word CONFIG_SYS_TEXT_BASE 12184ad6884SPeter Tyser 12284ad6884SPeter Tyser/* 12384ad6884SPeter Tyser * These are defined in the board-specific linker script. 12492d5ecbaSAlbert Aribaud * Subtracting _start from them lets the linker put their 12592d5ecbaSAlbert Aribaud * relative position in the executable instead of leaving 12692d5ecbaSAlbert Aribaud * them null. 12784ad6884SPeter Tyser */ 12892d5ecbaSAlbert Aribaud.globl _bss_start_ofs 12992d5ecbaSAlbert Aribaud_bss_start_ofs: 13092d5ecbaSAlbert Aribaud .word __bss_start - _start 13184ad6884SPeter Tyser 13292d5ecbaSAlbert Aribaud.globl _bss_end_ofs 13392d5ecbaSAlbert Aribaud_bss_end_ofs: 13444c6e659SPo-Yu Chuang .word __bss_end__ - _start 13584ad6884SPeter Tyser 136*f326cbbaSPo-Yu Chuang.globl _end_ofs 137*f326cbbaSPo-Yu Chuang_end_ofs: 138*f326cbbaSPo-Yu Chuang .word _end - _start 139*f326cbbaSPo-Yu Chuang 14084ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ 14184ad6884SPeter Tyser/* IRQ stack memory (calculated at run-time) */ 14284ad6884SPeter Tyser.globl IRQ_STACK_START 14384ad6884SPeter TyserIRQ_STACK_START: 14484ad6884SPeter Tyser .word 0x0badc0de 14584ad6884SPeter Tyser 14684ad6884SPeter Tyser/* IRQ stack memory (calculated at run-time) */ 14784ad6884SPeter Tyser.globl FIQ_STACK_START 14884ad6884SPeter TyserFIQ_STACK_START: 14984ad6884SPeter Tyser .word 0x0badc0de 15084ad6884SPeter Tyser#endif 15184ad6884SPeter Tyser 152ab86f72cSHeiko Schocher/* IRQ stack memory (calculated at run-time) + 8 bytes */ 153ab86f72cSHeiko Schocher.globl IRQ_STACK_START_IN 154ab86f72cSHeiko SchocherIRQ_STACK_START_IN: 155ab86f72cSHeiko Schocher .word 0x0badc0de 15684ad6884SPeter Tyser 157ab86f72cSHeiko Schocher/* 158ab86f72cSHeiko Schocher * the actual reset code 159ab86f72cSHeiko Schocher */ 160ab86f72cSHeiko Schocher 161ab86f72cSHeiko Schocherreset: 162ab86f72cSHeiko Schocher /* 163ab86f72cSHeiko Schocher * set the cpu to SVC32 mode 164ab86f72cSHeiko Schocher */ 165ab86f72cSHeiko Schocher mrs r0,cpsr 166ab86f72cSHeiko Schocher bic r0,r0,#0x1f 167ab86f72cSHeiko Schocher orr r0,r0,#0xd3 168ab86f72cSHeiko Schocher msr cpsr,r0 169ab86f72cSHeiko Schocher 170ab86f72cSHeiko Schocher /* 171ab86f72cSHeiko Schocher * we do sys-critical inits only at reboot, 172ab86f72cSHeiko Schocher * not when booting from ram! 173ab86f72cSHeiko Schocher */ 174ab86f72cSHeiko Schocher#ifndef CONFIG_SKIP_LOWLEVEL_INIT 175ab86f72cSHeiko Schocher bl cpu_init_crit 176ab86f72cSHeiko Schocher#endif 177ab86f72cSHeiko Schocher 178ab86f72cSHeiko Schocher/* Set stackpointer in internal RAM to call board_init_f */ 179ab86f72cSHeiko Schochercall_board_init_f: 180ab86f72cSHeiko Schocher ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) 181296cae73SHeiko Schocher bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 182ab86f72cSHeiko Schocher ldr r0,=0x00000000 183ab86f72cSHeiko Schocher bl board_init_f 184ab86f72cSHeiko Schocher 185ab86f72cSHeiko Schocher/*------------------------------------------------------------------------------*/ 186ab86f72cSHeiko Schocher 187ab86f72cSHeiko Schocher/* 188ab86f72cSHeiko Schocher * void relocate_code (addr_sp, gd, addr_moni) 189ab86f72cSHeiko Schocher * 190ab86f72cSHeiko Schocher * This "function" does not return, instead it continues in RAM 191ab86f72cSHeiko Schocher * after relocating the monitor code. 192ab86f72cSHeiko Schocher * 193ab86f72cSHeiko Schocher */ 194ab86f72cSHeiko Schocher .globl relocate_code 195ab86f72cSHeiko Schocherrelocate_code: 196ab86f72cSHeiko Schocher mov r4, r0 /* save addr_sp */ 197ab86f72cSHeiko Schocher mov r5, r1 /* save addr of gd */ 198ab86f72cSHeiko Schocher mov r6, r2 /* save addr of destination */ 199ab86f72cSHeiko Schocher 200ab86f72cSHeiko Schocher /* Set up the stack */ 201ab86f72cSHeiko Schocherstack_setup: 202ab86f72cSHeiko Schocher mov sp, r4 203ab86f72cSHeiko Schocher 204ab86f72cSHeiko Schocher adr r0, _start 205a1a47d3cSAndreas Bießmann cmp r0, r6 206a1a47d3cSAndreas Bießmann beq clear_bss /* skip relocation */ 207a78fb68fSAndreas Bießmann mov r1, r6 /* r1 <- scratch for copy loop */ 20892d5ecbaSAlbert Aribaud ldr r3, _bss_start_ofs 20992d5ecbaSAlbert Aribaud add r2, r0, r3 /* r2 <- source end address */ 210ab86f72cSHeiko Schocher 211ab86f72cSHeiko Schochercopy_loop: 212ab86f72cSHeiko Schocher ldmia r0!, {r9-r10} /* copy from source address [r0] */ 213a78fb68fSAndreas Bießmann stmia r1!, {r9-r10} /* copy to target address [r1] */ 214da90d4ceSAlbert Aribaud cmp r0, r2 /* until source end address [r2] */ 215da90d4ceSAlbert Aribaud blo copy_loop 216ab86f72cSHeiko Schocher 217ab86f72cSHeiko Schocher#ifndef CONFIG_PRELOADER 21892d5ecbaSAlbert Aribaud /* 21992d5ecbaSAlbert Aribaud * fix .rel.dyn relocations 22092d5ecbaSAlbert Aribaud */ 22192d5ecbaSAlbert Aribaud ldr r0, _TEXT_BASE /* r0 <- Text base */ 222a78fb68fSAndreas Bießmann sub r9, r6, r0 /* r9 <- relocation offset */ 22392d5ecbaSAlbert Aribaud ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ 22492d5ecbaSAlbert Aribaud add r10, r10, r0 /* r10 <- sym table in FLASH */ 22592d5ecbaSAlbert Aribaud ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ 22692d5ecbaSAlbert Aribaud add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ 22792d5ecbaSAlbert Aribaud ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ 22892d5ecbaSAlbert Aribaud add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ 229ab86f72cSHeiko Schocherfixloop: 23092d5ecbaSAlbert Aribaud ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ 2318c0c2b90SGray Remlin add r0, r0, r9 /* r0 <- location to fix up in RAM */ 23292d5ecbaSAlbert Aribaud ldr r1, [r2, #4] 2331f52d89fSAndreas Bießmann and r7, r1, #0xff 2341f52d89fSAndreas Bießmann cmp r7, #23 /* relative fixup? */ 23592d5ecbaSAlbert Aribaud beq fixrel 2361f52d89fSAndreas Bießmann cmp r7, #2 /* absolute fixup? */ 23792d5ecbaSAlbert Aribaud beq fixabs 23892d5ecbaSAlbert Aribaud /* ignore unknown type of fixup */ 23992d5ecbaSAlbert Aribaud b fixnext 24092d5ecbaSAlbert Aribaudfixabs: 24192d5ecbaSAlbert Aribaud /* absolute fix: set location to (offset) symbol value */ 24292d5ecbaSAlbert Aribaud mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ 24392d5ecbaSAlbert Aribaud add r1, r10, r1 /* r1 <- address of symbol in table */ 24492d5ecbaSAlbert Aribaud ldr r1, [r1, #4] /* r1 <- symbol value */ 2453600945bSWolfgang Denk add r1, r1, r9 /* r1 <- relocated sym addr */ 24692d5ecbaSAlbert Aribaud b fixnext 24792d5ecbaSAlbert Aribaudfixrel: 24892d5ecbaSAlbert Aribaud /* relative fix: increase location by offset */ 24992d5ecbaSAlbert Aribaud ldr r1, [r0] 25092d5ecbaSAlbert Aribaud add r1, r1, r9 25192d5ecbaSAlbert Aribaudfixnext: 25292d5ecbaSAlbert Aribaud str r1, [r0] 25392d5ecbaSAlbert Aribaud add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ 254ab86f72cSHeiko Schocher cmp r2, r3 25592d5ecbaSAlbert Aribaud blo fixloop 256ab86f72cSHeiko Schocher#endif 257ab86f72cSHeiko Schocher 258ab86f72cSHeiko Schocherclear_bss: 259ab86f72cSHeiko Schocher#ifndef CONFIG_PRELOADER 26092d5ecbaSAlbert Aribaud ldr r0, _bss_start_ofs 26192d5ecbaSAlbert Aribaud ldr r1, _bss_end_ofs 262a78fb68fSAndreas Bießmann mov r4, r6 /* reloc addr */ 263ab86f72cSHeiko Schocher add r0, r0, r4 264ab86f72cSHeiko Schocher add r1, r1, r4 265ab86f72cSHeiko Schocher mov r2, #0x00000000 /* clear */ 266ab86f72cSHeiko Schocher 267ab86f72cSHeiko Schocherclbss_l:str r2, [r0] /* clear loop... */ 268ab86f72cSHeiko Schocher add r0, r0, #4 269ab86f72cSHeiko Schocher cmp r0, r1 270ab86f72cSHeiko Schocher bne clbss_l 271ab86f72cSHeiko Schocher 272ab86f72cSHeiko Schocher bl coloured_LED_init 273ab86f72cSHeiko Schocher bl red_LED_on 274ab86f72cSHeiko Schocher#endif 275ab86f72cSHeiko Schocher 276ab86f72cSHeiko Schocher/* 277ab86f72cSHeiko Schocher * We are done. Do not return, instead branch to second part of board 278ab86f72cSHeiko Schocher * initialization, now running from RAM. 279ab86f72cSHeiko Schocher */ 280ab86f72cSHeiko Schocher#ifdef CONFIG_NAND_SPL 28192d5ecbaSAlbert Aribaud ldr r0, _nand_boot_ofs 2829710504dSHeiko Schocher mov pc, r0 283ab86f72cSHeiko Schocher 2849710504dSHeiko Schocher_nand_boot_ofs: 2859710504dSHeiko Schocher .word nand_boot 286ab86f72cSHeiko Schocher#else 28792d5ecbaSAlbert Aribaud ldr r0, _board_init_r_ofs 2886087f1a9SAlexander Stein ldr r1, _TEXT_BASE 289123fb7deSDarius Augulis add lr, r0, r1 290123fb7deSDarius Augulis add lr, lr, r9 291ab86f72cSHeiko Schocher /* setup parameters for board_init_r */ 292ab86f72cSHeiko Schocher mov r0, r5 /* gd_t */ 293a78fb68fSAndreas Bießmann mov r1, r6 /* dest_addr */ 294ab86f72cSHeiko Schocher /* jump to it ... */ 295ab86f72cSHeiko Schocher mov pc, lr 296ab86f72cSHeiko Schocher 29792d5ecbaSAlbert Aribaud_board_init_r_ofs: 29892d5ecbaSAlbert Aribaud .word board_init_r - _start 299ab86f72cSHeiko Schocher#endif 300ab86f72cSHeiko Schocher 30192d5ecbaSAlbert Aribaud_rel_dyn_start_ofs: 30292d5ecbaSAlbert Aribaud .word __rel_dyn_start - _start 30392d5ecbaSAlbert Aribaud_rel_dyn_end_ofs: 30492d5ecbaSAlbert Aribaud .word __rel_dyn_end - _start 30592d5ecbaSAlbert Aribaud_dynsym_start_ofs: 30692d5ecbaSAlbert Aribaud .word __dynsym_start - _start 30792d5ecbaSAlbert Aribaud 30884ad6884SPeter Tyser/* 30984ad6884SPeter Tyser ************************************************************************* 31084ad6884SPeter Tyser * 31184ad6884SPeter Tyser * CPU_init_critical registers 31284ad6884SPeter Tyser * 31384ad6884SPeter Tyser * setup important registers 31484ad6884SPeter Tyser * setup memory timing 31584ad6884SPeter Tyser * 31684ad6884SPeter Tyser ************************************************************************* 31784ad6884SPeter Tyser */ 31884ad6884SPeter Tyser#ifndef CONFIG_SKIP_LOWLEVEL_INIT 31984ad6884SPeter Tysercpu_init_crit: 32084ad6884SPeter Tyser /* 32184ad6884SPeter Tyser * flush v4 I/D caches 32284ad6884SPeter Tyser */ 32384ad6884SPeter Tyser mov r0, #0 32484ad6884SPeter Tyser mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 32584ad6884SPeter Tyser mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 32684ad6884SPeter Tyser 32784ad6884SPeter Tyser /* 32884ad6884SPeter Tyser * disable MMU stuff and caches 32984ad6884SPeter Tyser */ 33084ad6884SPeter Tyser mrc p15, 0, r0, c1, c0, 0 33184ad6884SPeter Tyser bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ 33284ad6884SPeter Tyser bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ 33384ad6884SPeter Tyser orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ 33484ad6884SPeter Tyser orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ 33584ad6884SPeter Tyser mcr p15, 0, r0, c1, c0, 0 33684ad6884SPeter Tyser 33784ad6884SPeter Tyser /* 33884ad6884SPeter Tyser * Go setup Memory and board specific bits prior to relocation. 33984ad6884SPeter Tyser */ 34084ad6884SPeter Tyser mov ip, lr /* perserve link reg across call */ 34184ad6884SPeter Tyser bl lowlevel_init /* go setup pll,mux,memory */ 34284ad6884SPeter Tyser mov lr, ip /* restore link */ 34384ad6884SPeter Tyser mov pc, lr /* back to my caller */ 34484ad6884SPeter Tyser#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 34584ad6884SPeter Tyser 34684ad6884SPeter Tyser#ifndef CONFIG_PRELOADER 34784ad6884SPeter Tyser/* 34884ad6884SPeter Tyser ************************************************************************* 34984ad6884SPeter Tyser * 35084ad6884SPeter Tyser * Interrupt handling 35184ad6884SPeter Tyser * 35284ad6884SPeter Tyser ************************************************************************* 35384ad6884SPeter Tyser */ 35484ad6884SPeter Tyser 35584ad6884SPeter Tyser@ 35684ad6884SPeter Tyser@ IRQ stack frame. 35784ad6884SPeter Tyser@ 35884ad6884SPeter Tyser#define S_FRAME_SIZE 72 35984ad6884SPeter Tyser 36084ad6884SPeter Tyser#define S_OLD_R0 68 36184ad6884SPeter Tyser#define S_PSR 64 36284ad6884SPeter Tyser#define S_PC 60 36384ad6884SPeter Tyser#define S_LR 56 36484ad6884SPeter Tyser#define S_SP 52 36584ad6884SPeter Tyser 36684ad6884SPeter Tyser#define S_IP 48 36784ad6884SPeter Tyser#define S_FP 44 36884ad6884SPeter Tyser#define S_R10 40 36984ad6884SPeter Tyser#define S_R9 36 37084ad6884SPeter Tyser#define S_R8 32 37184ad6884SPeter Tyser#define S_R7 28 37284ad6884SPeter Tyser#define S_R6 24 37384ad6884SPeter Tyser#define S_R5 20 37484ad6884SPeter Tyser#define S_R4 16 37584ad6884SPeter Tyser#define S_R3 12 37684ad6884SPeter Tyser#define S_R2 8 37784ad6884SPeter Tyser#define S_R1 4 37884ad6884SPeter Tyser#define S_R0 0 37984ad6884SPeter Tyser 38084ad6884SPeter Tyser#define MODE_SVC 0x13 38184ad6884SPeter Tyser#define I_BIT 0x80 38284ad6884SPeter Tyser 38384ad6884SPeter Tyser/* 38484ad6884SPeter Tyser * use bad_save_user_regs for abort/prefetch/undef/swi ... 38584ad6884SPeter Tyser * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling 38684ad6884SPeter Tyser */ 38784ad6884SPeter Tyser 38884ad6884SPeter Tyser .macro bad_save_user_regs 38984ad6884SPeter Tyser @ carve out a frame on current user stack 39084ad6884SPeter Tyser sub sp, sp, #S_FRAME_SIZE 39184ad6884SPeter Tyser stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 392ab86f72cSHeiko Schocher ldr r2, IRQ_STACK_START_IN 39384ad6884SPeter Tyser @ get values for "aborted" pc and cpsr (into parm regs) 39484ad6884SPeter Tyser ldmia r2, {r2 - r3} 39584ad6884SPeter Tyser add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack 39684ad6884SPeter Tyser add r5, sp, #S_SP 39784ad6884SPeter Tyser mov r1, lr 39884ad6884SPeter Tyser stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr 39984ad6884SPeter Tyser mov r0, sp @ save current stack into r0 (param register) 40084ad6884SPeter Tyser .endm 40184ad6884SPeter Tyser 40284ad6884SPeter Tyser .macro irq_save_user_regs 40384ad6884SPeter Tyser sub sp, sp, #S_FRAME_SIZE 40484ad6884SPeter Tyser stmia sp, {r0 - r12} @ Calling r0-r12 40584ad6884SPeter Tyser @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good. 40684ad6884SPeter Tyser add r8, sp, #S_PC 40784ad6884SPeter Tyser stmdb r8, {sp, lr}^ @ Calling SP, LR 40884ad6884SPeter Tyser str lr, [r8, #0] @ Save calling PC 40984ad6884SPeter Tyser mrs r6, spsr 41084ad6884SPeter Tyser str r6, [r8, #4] @ Save CPSR 41184ad6884SPeter Tyser str r0, [r8, #8] @ Save OLD_R0 41284ad6884SPeter Tyser mov r0, sp 41384ad6884SPeter Tyser .endm 41484ad6884SPeter Tyser 41584ad6884SPeter Tyser .macro irq_restore_user_regs 41684ad6884SPeter Tyser ldmia sp, {r0 - lr}^ @ Calling r0 - lr 41784ad6884SPeter Tyser mov r0, r0 41884ad6884SPeter Tyser ldr lr, [sp, #S_PC] @ Get PC 41984ad6884SPeter Tyser add sp, sp, #S_FRAME_SIZE 42084ad6884SPeter Tyser subs pc, lr, #4 @ return & move spsr_svc into cpsr 42184ad6884SPeter Tyser .endm 42284ad6884SPeter Tyser 42384ad6884SPeter Tyser .macro get_bad_stack 424ab86f72cSHeiko Schocher ldr r13, IRQ_STACK_START_IN @ setup our mode stack 42584ad6884SPeter Tyser 42684ad6884SPeter Tyser str lr, [r13] @ save caller lr in position 0 of saved stack 42784ad6884SPeter Tyser mrs lr, spsr @ get the spsr 42884ad6884SPeter Tyser str lr, [r13, #4] @ save spsr in position 1 of saved stack 42984ad6884SPeter Tyser mov r13, #MODE_SVC @ prepare SVC-Mode 43084ad6884SPeter Tyser @ msr spsr_c, r13 43184ad6884SPeter Tyser msr spsr, r13 @ switch modes, make sure moves will execute 43284ad6884SPeter Tyser mov lr, pc @ capture return pc 43384ad6884SPeter Tyser movs pc, lr @ jump to next instruction & switch modes. 43484ad6884SPeter Tyser .endm 43584ad6884SPeter Tyser 43684ad6884SPeter Tyser .macro get_irq_stack @ setup IRQ stack 43784ad6884SPeter Tyser ldr sp, IRQ_STACK_START 43884ad6884SPeter Tyser .endm 43984ad6884SPeter Tyser 44084ad6884SPeter Tyser .macro get_fiq_stack @ setup FIQ stack 44184ad6884SPeter Tyser ldr sp, FIQ_STACK_START 44284ad6884SPeter Tyser .endm 44384ad6884SPeter Tyser#endif /* CONFIG_PRELOADER */ 44484ad6884SPeter Tyser 44584ad6884SPeter Tyser/* 44684ad6884SPeter Tyser * exception handlers 44784ad6884SPeter Tyser */ 44884ad6884SPeter Tyser#ifdef CONFIG_PRELOADER 44984ad6884SPeter Tyser .align 5 45084ad6884SPeter Tyserdo_hang: 45184ad6884SPeter Tyser ldr sp, _TEXT_BASE /* switch to abort stack */ 45284ad6884SPeter Tyser1: 45384ad6884SPeter Tyser bl 1b /* hang and never return */ 45484ad6884SPeter Tyser#else /* !CONFIG_PRELOADER */ 45584ad6884SPeter Tyser .align 5 45684ad6884SPeter Tyserundefined_instruction: 45784ad6884SPeter Tyser get_bad_stack 45884ad6884SPeter Tyser bad_save_user_regs 45984ad6884SPeter Tyser bl do_undefined_instruction 46084ad6884SPeter Tyser 46184ad6884SPeter Tyser .align 5 46284ad6884SPeter Tysersoftware_interrupt: 46384ad6884SPeter Tyser get_bad_stack 46484ad6884SPeter Tyser bad_save_user_regs 46584ad6884SPeter Tyser bl do_software_interrupt 46684ad6884SPeter Tyser 46784ad6884SPeter Tyser .align 5 46884ad6884SPeter Tyserprefetch_abort: 46984ad6884SPeter Tyser get_bad_stack 47084ad6884SPeter Tyser bad_save_user_regs 47184ad6884SPeter Tyser bl do_prefetch_abort 47284ad6884SPeter Tyser 47384ad6884SPeter Tyser .align 5 47484ad6884SPeter Tyserdata_abort: 47584ad6884SPeter Tyser get_bad_stack 47684ad6884SPeter Tyser bad_save_user_regs 47784ad6884SPeter Tyser bl do_data_abort 47884ad6884SPeter Tyser 47984ad6884SPeter Tyser .align 5 48084ad6884SPeter Tysernot_used: 48184ad6884SPeter Tyser get_bad_stack 48284ad6884SPeter Tyser bad_save_user_regs 48384ad6884SPeter Tyser bl do_not_used 48484ad6884SPeter Tyser 48584ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ 48684ad6884SPeter Tyser 48784ad6884SPeter Tyser .align 5 48884ad6884SPeter Tyserirq: 48984ad6884SPeter Tyser get_irq_stack 49084ad6884SPeter Tyser irq_save_user_regs 49184ad6884SPeter Tyser bl do_irq 49284ad6884SPeter Tyser irq_restore_user_regs 49384ad6884SPeter Tyser 49484ad6884SPeter Tyser .align 5 49584ad6884SPeter Tyserfiq: 49684ad6884SPeter Tyser get_fiq_stack 49784ad6884SPeter Tyser /* someone ought to write a more effiction fiq_save_user_regs */ 49884ad6884SPeter Tyser irq_save_user_regs 49984ad6884SPeter Tyser bl do_fiq 50084ad6884SPeter Tyser irq_restore_user_regs 50184ad6884SPeter Tyser 50284ad6884SPeter Tyser#else 50384ad6884SPeter Tyser 50484ad6884SPeter Tyser .align 5 50584ad6884SPeter Tyserirq: 50684ad6884SPeter Tyser get_bad_stack 50784ad6884SPeter Tyser bad_save_user_regs 50884ad6884SPeter Tyser bl do_irq 50984ad6884SPeter Tyser 51084ad6884SPeter Tyser .align 5 51184ad6884SPeter Tyserfiq: 51284ad6884SPeter Tyser get_bad_stack 51384ad6884SPeter Tyser bad_save_user_regs 51484ad6884SPeter Tyser bl do_fiq 51584ad6884SPeter Tyser 51684ad6884SPeter Tyser#endif 51784ad6884SPeter Tyser#endif /* CONFIG_PRELOADER */ 518