xref: /openbmc/u-boot/arch/arm/cpu/arm926ejs/start.S (revision 8c0c2b90)
184ad6884SPeter Tyser/*
284ad6884SPeter Tyser *  armboot - Startup Code for ARM926EJS CPU-core
384ad6884SPeter Tyser *
484ad6884SPeter Tyser *  Copyright (c) 2003  Texas Instruments
584ad6884SPeter Tyser *
684ad6884SPeter Tyser *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
784ad6884SPeter Tyser *
884ad6884SPeter Tyser *  Copyright (c) 2001	Marius Gr�ger <mag@sysgo.de>
984ad6884SPeter Tyser *  Copyright (c) 2002	Alex Z�pke <azu@sysgo.de>
1084ad6884SPeter Tyser *  Copyright (c) 2002	Gary Jennejohn <garyj@denx.de>
1184ad6884SPeter Tyser *  Copyright (c) 2003	Richard Woodruff <r-woodruff2@ti.com>
1284ad6884SPeter Tyser *  Copyright (c) 2003	Kshitij <kshitij@ti.com>
1392d5ecbaSAlbert Aribaud *  Copyright (c) 2010	Albert Aribaud <albert.aribaud@free.fr>
1484ad6884SPeter Tyser *
1584ad6884SPeter Tyser * See file CREDITS for list of people who contributed to this
1684ad6884SPeter Tyser * project.
1784ad6884SPeter Tyser *
1884ad6884SPeter Tyser * This program is free software; you can redistribute it and/or
1984ad6884SPeter Tyser * modify it under the terms of the GNU General Public License as
2084ad6884SPeter Tyser * published by the Free Software Foundation; either version 2 of
2184ad6884SPeter Tyser * the License, or (at your option) any later version.
2284ad6884SPeter Tyser *
2384ad6884SPeter Tyser * This program is distributed in the hope that it will be useful,
2484ad6884SPeter Tyser * but WITHOUT ANY WARRANTY; without even the implied warranty of
2584ad6884SPeter Tyser * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
2684ad6884SPeter Tyser * GNU General Public License for more details.
2784ad6884SPeter Tyser *
2884ad6884SPeter Tyser * You should have received a copy of the GNU General Public License
2984ad6884SPeter Tyser * along with this program; if not, write to the Free Software
3084ad6884SPeter Tyser * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
3184ad6884SPeter Tyser * MA 02111-1307 USA
3284ad6884SPeter Tyser */
3384ad6884SPeter Tyser
3484ad6884SPeter Tyser
3584ad6884SPeter Tyser#include <config.h>
3684ad6884SPeter Tyser#include <common.h>
3784ad6884SPeter Tyser#include <version.h>
3884ad6884SPeter Tyser
3984ad6884SPeter Tyser#if defined(CONFIG_OMAP1610)
4084ad6884SPeter Tyser#include <./configs/omap1510.h>
4184ad6884SPeter Tyser#elif defined(CONFIG_OMAP730)
4284ad6884SPeter Tyser#include <./configs/omap730.h>
4384ad6884SPeter Tyser#endif
4484ad6884SPeter Tyser
4584ad6884SPeter Tyser/*
4684ad6884SPeter Tyser *************************************************************************
4784ad6884SPeter Tyser *
4884ad6884SPeter Tyser * Jump vector table as in table 3.1 in [1]
4984ad6884SPeter Tyser *
5084ad6884SPeter Tyser *************************************************************************
5184ad6884SPeter Tyser */
5284ad6884SPeter Tyser
5384ad6884SPeter Tyser
5484ad6884SPeter Tyser.globl _start
5584ad6884SPeter Tyser_start:
5684ad6884SPeter Tyser	b	reset
5784ad6884SPeter Tyser#ifdef CONFIG_PRELOADER
5884ad6884SPeter Tyser/* No exception handlers in preloader */
5984ad6884SPeter Tyser	ldr	pc, _hang
6084ad6884SPeter Tyser	ldr	pc, _hang
6184ad6884SPeter Tyser	ldr	pc, _hang
6284ad6884SPeter Tyser	ldr	pc, _hang
6384ad6884SPeter Tyser	ldr	pc, _hang
6484ad6884SPeter Tyser	ldr	pc, _hang
6584ad6884SPeter Tyser	ldr	pc, _hang
6684ad6884SPeter Tyser
6784ad6884SPeter Tyser_hang:
6884ad6884SPeter Tyser	.word	do_hang
6984ad6884SPeter Tyser/* pad to 64 byte boundary */
7084ad6884SPeter Tyser	.word	0x12345678
7184ad6884SPeter Tyser	.word	0x12345678
7284ad6884SPeter Tyser	.word	0x12345678
7384ad6884SPeter Tyser	.word	0x12345678
7484ad6884SPeter Tyser	.word	0x12345678
7584ad6884SPeter Tyser	.word	0x12345678
7684ad6884SPeter Tyser	.word	0x12345678
7784ad6884SPeter Tyser#else
7884ad6884SPeter Tyser	ldr	pc, _undefined_instruction
7984ad6884SPeter Tyser	ldr	pc, _software_interrupt
8084ad6884SPeter Tyser	ldr	pc, _prefetch_abort
8184ad6884SPeter Tyser	ldr	pc, _data_abort
8284ad6884SPeter Tyser	ldr	pc, _not_used
8384ad6884SPeter Tyser	ldr	pc, _irq
8484ad6884SPeter Tyser	ldr	pc, _fiq
8584ad6884SPeter Tyser
8684ad6884SPeter Tyser_undefined_instruction:
8784ad6884SPeter Tyser	.word undefined_instruction
8884ad6884SPeter Tyser_software_interrupt:
8984ad6884SPeter Tyser	.word software_interrupt
9084ad6884SPeter Tyser_prefetch_abort:
9184ad6884SPeter Tyser	.word prefetch_abort
9284ad6884SPeter Tyser_data_abort:
9384ad6884SPeter Tyser	.word data_abort
9484ad6884SPeter Tyser_not_used:
9584ad6884SPeter Tyser	.word not_used
9684ad6884SPeter Tyser_irq:
9784ad6884SPeter Tyser	.word irq
9884ad6884SPeter Tyser_fiq:
9984ad6884SPeter Tyser	.word fiq
10084ad6884SPeter Tyser
10184ad6884SPeter Tyser#endif	/* CONFIG_PRELOADER */
10284ad6884SPeter Tyser	.balignl 16,0xdeadbeef
10384ad6884SPeter Tyser
10484ad6884SPeter Tyser
10584ad6884SPeter Tyser/*
10684ad6884SPeter Tyser *************************************************************************
10784ad6884SPeter Tyser *
10884ad6884SPeter Tyser * Startup Code (reset vector)
10984ad6884SPeter Tyser *
11084ad6884SPeter Tyser * do important init only if we don't start from memory!
11184ad6884SPeter Tyser * setup Memory and board specific bits prior to relocation.
11284ad6884SPeter Tyser * relocate armboot to ram
11384ad6884SPeter Tyser * setup stack
11484ad6884SPeter Tyser *
11584ad6884SPeter Tyser *************************************************************************
11684ad6884SPeter Tyser */
11784ad6884SPeter Tyser
118ab86f72cSHeiko Schocher.globl _TEXT_BASE
11984ad6884SPeter Tyser_TEXT_BASE:
12014d0a02aSWolfgang Denk	.word	CONFIG_SYS_TEXT_BASE
12184ad6884SPeter Tyser
12284ad6884SPeter Tyser/*
12384ad6884SPeter Tyser * These are defined in the board-specific linker script.
12492d5ecbaSAlbert Aribaud * Subtracting _start from them lets the linker put their
12592d5ecbaSAlbert Aribaud * relative position in the executable instead of leaving
12692d5ecbaSAlbert Aribaud * them null.
12784ad6884SPeter Tyser */
12892d5ecbaSAlbert Aribaud.globl _bss_start_ofs
12992d5ecbaSAlbert Aribaud_bss_start_ofs:
13092d5ecbaSAlbert Aribaud	.word __bss_start - _start
13184ad6884SPeter Tyser
13292d5ecbaSAlbert Aribaud.globl _bss_end_ofs
13392d5ecbaSAlbert Aribaud_bss_end_ofs:
13492d5ecbaSAlbert Aribaud	.word _end - _start
13584ad6884SPeter Tyser
13684ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ
13784ad6884SPeter Tyser/* IRQ stack memory (calculated at run-time) */
13884ad6884SPeter Tyser.globl IRQ_STACK_START
13984ad6884SPeter TyserIRQ_STACK_START:
14084ad6884SPeter Tyser	.word	0x0badc0de
14184ad6884SPeter Tyser
14284ad6884SPeter Tyser/* IRQ stack memory (calculated at run-time) */
14384ad6884SPeter Tyser.globl FIQ_STACK_START
14484ad6884SPeter TyserFIQ_STACK_START:
14584ad6884SPeter Tyser	.word 0x0badc0de
14684ad6884SPeter Tyser#endif
14784ad6884SPeter Tyser
148ab86f72cSHeiko Schocher#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
149ab86f72cSHeiko Schocher/* IRQ stack memory (calculated at run-time) + 8 bytes */
150ab86f72cSHeiko Schocher.globl IRQ_STACK_START_IN
151ab86f72cSHeiko SchocherIRQ_STACK_START_IN:
152ab86f72cSHeiko Schocher	.word	0x0badc0de
15384ad6884SPeter Tyser
154ab86f72cSHeiko Schocher/*
155ab86f72cSHeiko Schocher * the actual reset code
156ab86f72cSHeiko Schocher */
157ab86f72cSHeiko Schocher
158ab86f72cSHeiko Schocherreset:
159ab86f72cSHeiko Schocher	/*
160ab86f72cSHeiko Schocher	 * set the cpu to SVC32 mode
161ab86f72cSHeiko Schocher	 */
162ab86f72cSHeiko Schocher	mrs	r0,cpsr
163ab86f72cSHeiko Schocher	bic	r0,r0,#0x1f
164ab86f72cSHeiko Schocher	orr	r0,r0,#0xd3
165ab86f72cSHeiko Schocher	msr	cpsr,r0
166ab86f72cSHeiko Schocher
167ab86f72cSHeiko Schocher	/*
168ab86f72cSHeiko Schocher	 * we do sys-critical inits only at reboot,
169ab86f72cSHeiko Schocher	 * not when booting from ram!
170ab86f72cSHeiko Schocher	 */
171ab86f72cSHeiko Schocher#ifndef CONFIG_SKIP_LOWLEVEL_INIT
172ab86f72cSHeiko Schocher	bl	cpu_init_crit
173ab86f72cSHeiko Schocher#endif
174ab86f72cSHeiko Schocher
175ab86f72cSHeiko Schocher/* Set stackpointer in internal RAM to call board_init_f */
176ab86f72cSHeiko Schochercall_board_init_f:
177ab86f72cSHeiko Schocher	ldr	sp, =(CONFIG_SYS_INIT_SP_ADDR)
178ab86f72cSHeiko Schocher	ldr	r0,=0x00000000
179ab86f72cSHeiko Schocher	bl	board_init_f
180ab86f72cSHeiko Schocher
181ab86f72cSHeiko Schocher/*------------------------------------------------------------------------------*/
182ab86f72cSHeiko Schocher
183ab86f72cSHeiko Schocher/*
184ab86f72cSHeiko Schocher * void relocate_code (addr_sp, gd, addr_moni)
185ab86f72cSHeiko Schocher *
186ab86f72cSHeiko Schocher * This "function" does not return, instead it continues in RAM
187ab86f72cSHeiko Schocher * after relocating the monitor code.
188ab86f72cSHeiko Schocher *
189ab86f72cSHeiko Schocher */
190ab86f72cSHeiko Schocher	.globl	relocate_code
191ab86f72cSHeiko Schocherrelocate_code:
192ab86f72cSHeiko Schocher	mov	r4, r0	/* save addr_sp */
193ab86f72cSHeiko Schocher	mov	r5, r1	/* save addr of gd */
194ab86f72cSHeiko Schocher	mov	r6, r2	/* save addr of destination */
195ab86f72cSHeiko Schocher	mov	r7, r2	/* save addr of destination */
196ab86f72cSHeiko Schocher
197ab86f72cSHeiko Schocher	/* Set up the stack						    */
198ab86f72cSHeiko Schocherstack_setup:
199ab86f72cSHeiko Schocher	mov	sp, r4
200ab86f72cSHeiko Schocher
201ab86f72cSHeiko Schocher	adr	r0, _start
202ab86f72cSHeiko Schocher	ldr	r2, _TEXT_BASE
20392d5ecbaSAlbert Aribaud	ldr	r3, _bss_start_ofs
20492d5ecbaSAlbert Aribaud	add	r2, r0, r3		/* r2 <- source end address	    */
205ab86f72cSHeiko Schocher	cmp	r0, r6
206ab86f72cSHeiko Schocher	beq	clear_bss
207ab86f72cSHeiko Schocher
208ab86f72cSHeiko Schocher#ifndef CONFIG_SKIP_RELOCATE_UBOOT
209ab86f72cSHeiko Schochercopy_loop:
210ab86f72cSHeiko Schocher	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
211ab86f72cSHeiko Schocher	stmia	r6!, {r9-r10}		/* copy to   target address [r1]    */
212da90d4ceSAlbert Aribaud	cmp	r0, r2			/* until source end address [r2]    */
213da90d4ceSAlbert Aribaud	blo	copy_loop
214ab86f72cSHeiko Schocher
215ab86f72cSHeiko Schocher#ifndef CONFIG_PRELOADER
21692d5ecbaSAlbert Aribaud	/*
21792d5ecbaSAlbert Aribaud	 * fix .rel.dyn relocations
21892d5ecbaSAlbert Aribaud	 */
21992d5ecbaSAlbert Aribaud	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
22092d5ecbaSAlbert Aribaud	sub	r9, r7, r0		/* r9 <- relocation offset */
22192d5ecbaSAlbert Aribaud	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
22292d5ecbaSAlbert Aribaud	add	r10, r10, r0		/* r10 <- sym table in FLASH */
22392d5ecbaSAlbert Aribaud	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
22492d5ecbaSAlbert Aribaud	add	r2, r2, r0		/* r2 <- rel dyn start in FLASH */
22592d5ecbaSAlbert Aribaud	ldr	r3, _rel_dyn_end_ofs	/* r3 <- rel dyn end ofs */
22692d5ecbaSAlbert Aribaud	add	r3, r3, r0		/* r3 <- rel dyn end in FLASH */
227ab86f72cSHeiko Schocherfixloop:
22892d5ecbaSAlbert Aribaud	ldr	r0, [r2]		/* r0 <- location to fix up, IN FLASH! */
229*8c0c2b90SGray Remlin	add	r0, r0, r9		/* r0 <- location to fix up in RAM */
23092d5ecbaSAlbert Aribaud	ldr	r1, [r2, #4]
23192d5ecbaSAlbert Aribaud	and	r8, r1, #0xff
23292d5ecbaSAlbert Aribaud	cmp	r8, #23			/* relative fixup? */
23392d5ecbaSAlbert Aribaud	beq	fixrel
23492d5ecbaSAlbert Aribaud	cmp	r8, #2			/* absolute fixup? */
23592d5ecbaSAlbert Aribaud	beq	fixabs
23692d5ecbaSAlbert Aribaud	/* ignore unknown type of fixup */
23792d5ecbaSAlbert Aribaud	b	fixnext
23892d5ecbaSAlbert Aribaudfixabs:
23992d5ecbaSAlbert Aribaud	/* absolute fix: set location to (offset) symbol value */
24092d5ecbaSAlbert Aribaud	mov	r1, r1, LSR #4		/* r1 <- symbol index in .dynsym */
24192d5ecbaSAlbert Aribaud	add	r1, r10, r1		/* r1 <- address of symbol in table */
24292d5ecbaSAlbert Aribaud	ldr	r1, [r1, #4]		/* r1 <- symbol value */
24392d5ecbaSAlbert Aribaud	add	r1, r9			/* r1 <- relocated sym addr */
24492d5ecbaSAlbert Aribaud	b	fixnext
24592d5ecbaSAlbert Aribaudfixrel:
24692d5ecbaSAlbert Aribaud	/* relative fix: increase location by offset */
24792d5ecbaSAlbert Aribaud	ldr	r1, [r0]
24892d5ecbaSAlbert Aribaud	add	r1, r1, r9
24992d5ecbaSAlbert Aribaudfixnext:
25092d5ecbaSAlbert Aribaud	str	r1, [r0]
25192d5ecbaSAlbert Aribaud	add	r2, r2, #8		/* each rel.dyn entry is 8 bytes */
252ab86f72cSHeiko Schocher	cmp	r2, r3
25392d5ecbaSAlbert Aribaud	blo	fixloop
254ab86f72cSHeiko Schocher#endif
255ab86f72cSHeiko Schocher#endif	/* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
256ab86f72cSHeiko Schocher
257ab86f72cSHeiko Schocherclear_bss:
258ab86f72cSHeiko Schocher#ifndef CONFIG_PRELOADER
25992d5ecbaSAlbert Aribaud	ldr	r0, _bss_start_ofs
26092d5ecbaSAlbert Aribaud	ldr	r1, _bss_end_ofs
261ab86f72cSHeiko Schocher	ldr	r3, _TEXT_BASE		/* Text base */
262ab86f72cSHeiko Schocher	mov	r4, r7			/* reloc addr */
263ab86f72cSHeiko Schocher	add	r0, r0, r4
264ab86f72cSHeiko Schocher	add	r1, r1, r4
265ab86f72cSHeiko Schocher	mov	r2, #0x00000000		/* clear			    */
266ab86f72cSHeiko Schocher
267ab86f72cSHeiko Schocherclbss_l:str	r2, [r0]		/* clear loop...		    */
268ab86f72cSHeiko Schocher	add	r0, r0, #4
269ab86f72cSHeiko Schocher	cmp	r0, r1
270ab86f72cSHeiko Schocher	bne	clbss_l
271ab86f72cSHeiko Schocher
272ab86f72cSHeiko Schocher	bl coloured_LED_init
273ab86f72cSHeiko Schocher	bl red_LED_on
274ab86f72cSHeiko Schocher#endif
275ab86f72cSHeiko Schocher
276ab86f72cSHeiko Schocher/*
277ab86f72cSHeiko Schocher * We are done. Do not return, instead branch to second part of board
278ab86f72cSHeiko Schocher * initialization, now running from RAM.
279ab86f72cSHeiko Schocher */
280ab86f72cSHeiko Schocher#ifdef CONFIG_NAND_SPL
28192d5ecbaSAlbert Aribaud	ldr     r0, _nand_boot_ofs
2829710504dSHeiko Schocher	mov	pc, r0
283ab86f72cSHeiko Schocher
2849710504dSHeiko Schocher_nand_boot_ofs:
2859710504dSHeiko Schocher	.word nand_boot
286ab86f72cSHeiko Schocher#else
28792d5ecbaSAlbert Aribaud	ldr	r0, _board_init_r_ofs
28892d5ecbaSAlbert Aribaud	adr	r1, _start
28992d5ecbaSAlbert Aribaud	add	r0, r0, r1
29092d5ecbaSAlbert Aribaud	add	lr, r0, r9
291ab86f72cSHeiko Schocher	/* setup parameters for board_init_r */
292ab86f72cSHeiko Schocher	mov	r0, r5		/* gd_t */
293ab86f72cSHeiko Schocher	mov	r1, r7		/* dest_addr */
294ab86f72cSHeiko Schocher	/* jump to it ... */
295ab86f72cSHeiko Schocher	mov	pc, lr
296ab86f72cSHeiko Schocher
29792d5ecbaSAlbert Aribaud_board_init_r_ofs:
29892d5ecbaSAlbert Aribaud	.word board_init_r - _start
299ab86f72cSHeiko Schocher#endif
300ab86f72cSHeiko Schocher
30192d5ecbaSAlbert Aribaud_rel_dyn_start_ofs:
30292d5ecbaSAlbert Aribaud	.word __rel_dyn_start - _start
30392d5ecbaSAlbert Aribaud_rel_dyn_end_ofs:
30492d5ecbaSAlbert Aribaud	.word __rel_dyn_end - _start
30592d5ecbaSAlbert Aribaud_dynsym_start_ofs:
30692d5ecbaSAlbert Aribaud	.word __dynsym_start - _start
30792d5ecbaSAlbert Aribaud
308ab86f72cSHeiko Schocher#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
30984ad6884SPeter Tyser/*
31084ad6884SPeter Tyser * the actual reset code
31184ad6884SPeter Tyser */
31284ad6884SPeter Tyser
31384ad6884SPeter Tyserreset:
31484ad6884SPeter Tyser	/*
31584ad6884SPeter Tyser	 * set the cpu to SVC32 mode
31684ad6884SPeter Tyser	 */
31784ad6884SPeter Tyser	mrs	r0,cpsr
31884ad6884SPeter Tyser	bic	r0,r0,#0x1f
31984ad6884SPeter Tyser	orr	r0,r0,#0xd3
32084ad6884SPeter Tyser	msr	cpsr,r0
32184ad6884SPeter Tyser
32284ad6884SPeter Tyser	/*
32384ad6884SPeter Tyser	 * we do sys-critical inits only at reboot,
32484ad6884SPeter Tyser	 * not when booting from ram!
32584ad6884SPeter Tyser	 */
32684ad6884SPeter Tyser#ifndef CONFIG_SKIP_LOWLEVEL_INIT
32784ad6884SPeter Tyser	bl	cpu_init_crit
32884ad6884SPeter Tyser#endif
32984ad6884SPeter Tyser
33084ad6884SPeter Tyser#ifndef CONFIG_SKIP_RELOCATE_UBOOT
33184ad6884SPeter Tyserrelocate:				/* relocate U-Boot to RAM	    */
33284ad6884SPeter Tyser	adr	r0, _start		/* r0 <- current position of code   */
33384ad6884SPeter Tyser	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
33484ad6884SPeter Tyser	cmp     r0, r1                  /* don't reloc during debug         */
33584ad6884SPeter Tyser	beq     stack_setup
33692d5ecbaSAlbert Aribaud	ldr	r3, _bss_start_ofs	/* r3 <- _bss_start - _start	    */
33792d5ecbaSAlbert Aribaud	add	r2, r0, r3		/* r2 <- source end address         */
33884ad6884SPeter Tyser
33984ad6884SPeter Tysercopy_loop:
34084ad6884SPeter Tyser	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
34184ad6884SPeter Tyser	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
342da90d4ceSAlbert Aribaud	cmp	r0, r2			/* until source end address [r2]    */
343da90d4ceSAlbert Aribaud	blo	copy_loop
34484ad6884SPeter Tyser#endif	/* CONFIG_SKIP_RELOCATE_UBOOT */
34584ad6884SPeter Tyser
34684ad6884SPeter Tyser	/* Set up the stack						    */
34784ad6884SPeter Tyserstack_setup:
34884ad6884SPeter Tyser	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
34984ad6884SPeter Tyser	sub	sp, r0, #128		/* leave 32 words for abort-stack   */
35084ad6884SPeter Tyser#ifndef CONFIG_PRELOADER
35184ad6884SPeter Tyser	sub	r0, r0, #CONFIG_SYS_MALLOC_LEN	/* malloc area                      */
35284ad6884SPeter Tyser	sub	r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo                        */
35384ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ
35484ad6884SPeter Tyser	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
35584ad6884SPeter Tyser#endif
35684ad6884SPeter Tyser#endif /* CONFIG_PRELOADER */
35784ad6884SPeter Tyser	sub	sp, r0, #12		/* leave 3 words for abort-stack    */
3581a27f7d9SVitaly Kuzmichev	bic	sp, sp, #7		/* 8-byte alignment for ABI compliance */
35984ad6884SPeter Tyser
36084ad6884SPeter Tyserclear_bss:
36192d5ecbaSAlbert Aribaud	adr	r2, _start
36292d5ecbaSAlbert Aribaud	ldr	r0, _bss_start_ofs	/* find start of bss segment        */
36392d5ecbaSAlbert Aribaud	add	r0, r0, r2
36492d5ecbaSAlbert Aribaud	ldr	r1, _bss_end_ofs	/* stop here                        */
36592d5ecbaSAlbert Aribaud	add	r1, r1, r2
36684ad6884SPeter Tyser	mov	r2, #0x00000000		/* clear                            */
36784ad6884SPeter Tyser
36884ad6884SPeter Tyser#ifndef CONFIG_PRELOADER
36984ad6884SPeter Tyserclbss_l:str	r2, [r0]		/* clear loop...                    */
37084ad6884SPeter Tyser	add	r0, r0, #4
37184ad6884SPeter Tyser	cmp	r0, r1
372da90d4ceSAlbert Aribaud	blo	clbss_l
37384ad6884SPeter Tyser
37484ad6884SPeter Tyser	bl coloured_LED_init
37584ad6884SPeter Tyser	bl red_LED_on
37684ad6884SPeter Tyser#endif /* CONFIG_PRELOADER */
37784ad6884SPeter Tyser
37892d5ecbaSAlbert Aribaud	ldr	r0, _start_armboot_ofs
37992d5ecbaSAlbert Aribaud	adr	r1, _start
38092d5ecbaSAlbert Aribaud	add	r0, r0, r1
38192d5ecbaSAlbert Aribaud	ldr	pc, r0
38284ad6884SPeter Tyser
38392d5ecbaSAlbert Aribaud_start_armboot_ofs:
38484ad6884SPeter Tyser#ifdef CONFIG_NAND_SPL
38592d5ecbaSAlbert Aribaud	.word nand_boot - _start
38684ad6884SPeter Tyser#else
38792d5ecbaSAlbert Aribaud	.word start_armboot - _start
38884ad6884SPeter Tyser#endif /* CONFIG_NAND_SPL */
389ab86f72cSHeiko Schocher#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
39084ad6884SPeter Tyser
39184ad6884SPeter Tyser/*
39284ad6884SPeter Tyser *************************************************************************
39384ad6884SPeter Tyser *
39484ad6884SPeter Tyser * CPU_init_critical registers
39584ad6884SPeter Tyser *
39684ad6884SPeter Tyser * setup important registers
39784ad6884SPeter Tyser * setup memory timing
39884ad6884SPeter Tyser *
39984ad6884SPeter Tyser *************************************************************************
40084ad6884SPeter Tyser */
40184ad6884SPeter Tyser#ifndef CONFIG_SKIP_LOWLEVEL_INIT
40284ad6884SPeter Tysercpu_init_crit:
40384ad6884SPeter Tyser	/*
40484ad6884SPeter Tyser	 * flush v4 I/D caches
40584ad6884SPeter Tyser	 */
40684ad6884SPeter Tyser	mov	r0, #0
40784ad6884SPeter Tyser	mcr	p15, 0, r0, c7, c7, 0	/* flush v3/v4 cache */
40884ad6884SPeter Tyser	mcr	p15, 0, r0, c8, c7, 0	/* flush v4 TLB */
40984ad6884SPeter Tyser
41084ad6884SPeter Tyser	/*
41184ad6884SPeter Tyser	 * disable MMU stuff and caches
41284ad6884SPeter Tyser	 */
41384ad6884SPeter Tyser	mrc	p15, 0, r0, c1, c0, 0
41484ad6884SPeter Tyser	bic	r0, r0, #0x00002300	/* clear bits 13, 9:8 (--V- --RS) */
41584ad6884SPeter Tyser	bic	r0, r0, #0x00000087	/* clear bits 7, 2:0 (B--- -CAM) */
41684ad6884SPeter Tyser	orr	r0, r0, #0x00000002	/* set bit 2 (A) Align */
41784ad6884SPeter Tyser	orr	r0, r0, #0x00001000	/* set bit 12 (I) I-Cache */
41884ad6884SPeter Tyser	mcr	p15, 0, r0, c1, c0, 0
41984ad6884SPeter Tyser
42084ad6884SPeter Tyser	/*
42184ad6884SPeter Tyser	 * Go setup Memory and board specific bits prior to relocation.
42284ad6884SPeter Tyser	 */
42384ad6884SPeter Tyser	mov	ip, lr		/* perserve link reg across call */
42484ad6884SPeter Tyser	bl	lowlevel_init	/* go setup pll,mux,memory */
42584ad6884SPeter Tyser	mov	lr, ip		/* restore link */
42684ad6884SPeter Tyser	mov	pc, lr		/* back to my caller */
42784ad6884SPeter Tyser#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
42884ad6884SPeter Tyser
42984ad6884SPeter Tyser#ifndef CONFIG_PRELOADER
43084ad6884SPeter Tyser/*
43184ad6884SPeter Tyser *************************************************************************
43284ad6884SPeter Tyser *
43384ad6884SPeter Tyser * Interrupt handling
43484ad6884SPeter Tyser *
43584ad6884SPeter Tyser *************************************************************************
43684ad6884SPeter Tyser */
43784ad6884SPeter Tyser
43884ad6884SPeter Tyser@
43984ad6884SPeter Tyser@ IRQ stack frame.
44084ad6884SPeter Tyser@
44184ad6884SPeter Tyser#define S_FRAME_SIZE	72
44284ad6884SPeter Tyser
44384ad6884SPeter Tyser#define S_OLD_R0	68
44484ad6884SPeter Tyser#define S_PSR		64
44584ad6884SPeter Tyser#define S_PC		60
44684ad6884SPeter Tyser#define S_LR		56
44784ad6884SPeter Tyser#define S_SP		52
44884ad6884SPeter Tyser
44984ad6884SPeter Tyser#define S_IP		48
45084ad6884SPeter Tyser#define S_FP		44
45184ad6884SPeter Tyser#define S_R10		40
45284ad6884SPeter Tyser#define S_R9		36
45384ad6884SPeter Tyser#define S_R8		32
45484ad6884SPeter Tyser#define S_R7		28
45584ad6884SPeter Tyser#define S_R6		24
45684ad6884SPeter Tyser#define S_R5		20
45784ad6884SPeter Tyser#define S_R4		16
45884ad6884SPeter Tyser#define S_R3		12
45984ad6884SPeter Tyser#define S_R2		8
46084ad6884SPeter Tyser#define S_R1		4
46184ad6884SPeter Tyser#define S_R0		0
46284ad6884SPeter Tyser
46384ad6884SPeter Tyser#define MODE_SVC 0x13
46484ad6884SPeter Tyser#define I_BIT	 0x80
46584ad6884SPeter Tyser
46684ad6884SPeter Tyser/*
46784ad6884SPeter Tyser * use bad_save_user_regs for abort/prefetch/undef/swi ...
46884ad6884SPeter Tyser * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
46984ad6884SPeter Tyser */
47084ad6884SPeter Tyser
47184ad6884SPeter Tyser	.macro	bad_save_user_regs
47284ad6884SPeter Tyser	@ carve out a frame on current user stack
47384ad6884SPeter Tyser	sub	sp, sp, #S_FRAME_SIZE
47484ad6884SPeter Tyser	stmia	sp, {r0 - r12}	@ Save user registers (now in svc mode) r0-r12
475ab86f72cSHeiko Schocher#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
47692d5ecbaSAlbert Aribaud	adr	r2, _start
47784ad6884SPeter Tyser	sub	r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
47884ad6884SPeter Tyser	sub	r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
479ab86f72cSHeiko Schocher#else
480ab86f72cSHeiko Schocher	ldr	r2, IRQ_STACK_START_IN
481ab86f72cSHeiko Schocher#endif
48284ad6884SPeter Tyser	@ get values for "aborted" pc and cpsr (into parm regs)
48384ad6884SPeter Tyser	ldmia	r2, {r2 - r3}
48484ad6884SPeter Tyser	add	r0, sp, #S_FRAME_SIZE		@ grab pointer to old stack
48584ad6884SPeter Tyser	add	r5, sp, #S_SP
48684ad6884SPeter Tyser	mov	r1, lr
48784ad6884SPeter Tyser	stmia	r5, {r0 - r3}	@ save sp_SVC, lr_SVC, pc, cpsr
48884ad6884SPeter Tyser	mov	r0, sp		@ save current stack into r0 (param register)
48984ad6884SPeter Tyser	.endm
49084ad6884SPeter Tyser
49184ad6884SPeter Tyser	.macro	irq_save_user_regs
49284ad6884SPeter Tyser	sub	sp, sp, #S_FRAME_SIZE
49384ad6884SPeter Tyser	stmia	sp, {r0 - r12}			@ Calling r0-r12
49484ad6884SPeter Tyser	@ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
49584ad6884SPeter Tyser	add	r8, sp, #S_PC
49684ad6884SPeter Tyser	stmdb	r8, {sp, lr}^		@ Calling SP, LR
49784ad6884SPeter Tyser	str	lr, [r8, #0]		@ Save calling PC
49884ad6884SPeter Tyser	mrs	r6, spsr
49984ad6884SPeter Tyser	str	r6, [r8, #4]		@ Save CPSR
50084ad6884SPeter Tyser	str	r0, [r8, #8]		@ Save OLD_R0
50184ad6884SPeter Tyser	mov	r0, sp
50284ad6884SPeter Tyser	.endm
50384ad6884SPeter Tyser
50484ad6884SPeter Tyser	.macro	irq_restore_user_regs
50584ad6884SPeter Tyser	ldmia	sp, {r0 - lr}^			@ Calling r0 - lr
50684ad6884SPeter Tyser	mov	r0, r0
50784ad6884SPeter Tyser	ldr	lr, [sp, #S_PC]			@ Get PC
50884ad6884SPeter Tyser	add	sp, sp, #S_FRAME_SIZE
50984ad6884SPeter Tyser	subs	pc, lr, #4		@ return & move spsr_svc into cpsr
51084ad6884SPeter Tyser	.endm
51184ad6884SPeter Tyser
51284ad6884SPeter Tyser	.macro get_bad_stack
513ab86f72cSHeiko Schocher#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
51492d5ecbaSAlbert Aribaud	adr	r13, _start		@ setup our mode stack
51584ad6884SPeter Tyser	sub	r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
51684ad6884SPeter Tyser	sub	r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
517ab86f72cSHeiko Schocher#else
518ab86f72cSHeiko Schocher	ldr	r13, IRQ_STACK_START_IN		@ setup our mode stack
519ab86f72cSHeiko Schocher#endif
52084ad6884SPeter Tyser
52184ad6884SPeter Tyser	str	lr, [r13]	@ save caller lr in position 0 of saved stack
52284ad6884SPeter Tyser	mrs	lr, spsr	@ get the spsr
52384ad6884SPeter Tyser	str	lr, [r13, #4]	@ save spsr in position 1 of saved stack
52484ad6884SPeter Tyser	mov	r13, #MODE_SVC	@ prepare SVC-Mode
52584ad6884SPeter Tyser	@ msr	spsr_c, r13
52684ad6884SPeter Tyser	msr	spsr, r13	@ switch modes, make sure moves will execute
52784ad6884SPeter Tyser	mov	lr, pc		@ capture return pc
52884ad6884SPeter Tyser	movs	pc, lr		@ jump to next instruction & switch modes.
52984ad6884SPeter Tyser	.endm
53084ad6884SPeter Tyser
53184ad6884SPeter Tyser	.macro get_irq_stack			@ setup IRQ stack
53284ad6884SPeter Tyser	ldr	sp, IRQ_STACK_START
53384ad6884SPeter Tyser	.endm
53484ad6884SPeter Tyser
53584ad6884SPeter Tyser	.macro get_fiq_stack			@ setup FIQ stack
53684ad6884SPeter Tyser	ldr	sp, FIQ_STACK_START
53784ad6884SPeter Tyser	.endm
53884ad6884SPeter Tyser#endif	/* CONFIG_PRELOADER */
53984ad6884SPeter Tyser
54084ad6884SPeter Tyser/*
54184ad6884SPeter Tyser * exception handlers
54284ad6884SPeter Tyser */
54384ad6884SPeter Tyser#ifdef CONFIG_PRELOADER
54484ad6884SPeter Tyser	.align	5
54584ad6884SPeter Tyserdo_hang:
54684ad6884SPeter Tyser	ldr	sp, _TEXT_BASE			/* switch to abort stack */
54784ad6884SPeter Tyser1:
54884ad6884SPeter Tyser	bl	1b				/* hang and never return */
54984ad6884SPeter Tyser#else	/* !CONFIG_PRELOADER */
55084ad6884SPeter Tyser	.align  5
55184ad6884SPeter Tyserundefined_instruction:
55284ad6884SPeter Tyser	get_bad_stack
55384ad6884SPeter Tyser	bad_save_user_regs
55484ad6884SPeter Tyser	bl	do_undefined_instruction
55584ad6884SPeter Tyser
55684ad6884SPeter Tyser	.align	5
55784ad6884SPeter Tysersoftware_interrupt:
55884ad6884SPeter Tyser	get_bad_stack
55984ad6884SPeter Tyser	bad_save_user_regs
56084ad6884SPeter Tyser	bl	do_software_interrupt
56184ad6884SPeter Tyser
56284ad6884SPeter Tyser	.align	5
56384ad6884SPeter Tyserprefetch_abort:
56484ad6884SPeter Tyser	get_bad_stack
56584ad6884SPeter Tyser	bad_save_user_regs
56684ad6884SPeter Tyser	bl	do_prefetch_abort
56784ad6884SPeter Tyser
56884ad6884SPeter Tyser	.align	5
56984ad6884SPeter Tyserdata_abort:
57084ad6884SPeter Tyser	get_bad_stack
57184ad6884SPeter Tyser	bad_save_user_regs
57284ad6884SPeter Tyser	bl	do_data_abort
57384ad6884SPeter Tyser
57484ad6884SPeter Tyser	.align	5
57584ad6884SPeter Tysernot_used:
57684ad6884SPeter Tyser	get_bad_stack
57784ad6884SPeter Tyser	bad_save_user_regs
57884ad6884SPeter Tyser	bl	do_not_used
57984ad6884SPeter Tyser
58084ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ
58184ad6884SPeter Tyser
58284ad6884SPeter Tyser	.align	5
58384ad6884SPeter Tyserirq:
58484ad6884SPeter Tyser	get_irq_stack
58584ad6884SPeter Tyser	irq_save_user_regs
58684ad6884SPeter Tyser	bl	do_irq
58784ad6884SPeter Tyser	irq_restore_user_regs
58884ad6884SPeter Tyser
58984ad6884SPeter Tyser	.align	5
59084ad6884SPeter Tyserfiq:
59184ad6884SPeter Tyser	get_fiq_stack
59284ad6884SPeter Tyser	/* someone ought to write a more effiction fiq_save_user_regs */
59384ad6884SPeter Tyser	irq_save_user_regs
59484ad6884SPeter Tyser	bl	do_fiq
59584ad6884SPeter Tyser	irq_restore_user_regs
59684ad6884SPeter Tyser
59784ad6884SPeter Tyser#else
59884ad6884SPeter Tyser
59984ad6884SPeter Tyser	.align	5
60084ad6884SPeter Tyserirq:
60184ad6884SPeter Tyser	get_bad_stack
60284ad6884SPeter Tyser	bad_save_user_regs
60384ad6884SPeter Tyser	bl	do_irq
60484ad6884SPeter Tyser
60584ad6884SPeter Tyser	.align	5
60684ad6884SPeter Tyserfiq:
60784ad6884SPeter Tyser	get_bad_stack
60884ad6884SPeter Tyser	bad_save_user_regs
60984ad6884SPeter Tyser	bl	do_fiq
61084ad6884SPeter Tyser
61184ad6884SPeter Tyser#endif
61284ad6884SPeter Tyser#endif	/* CONFIG_PRELOADER */
613