184ad6884SPeter Tyser/* 284ad6884SPeter Tyser * armboot - Startup Code for ARM926EJS CPU-core 384ad6884SPeter Tyser * 484ad6884SPeter Tyser * Copyright (c) 2003 Texas Instruments 584ad6884SPeter Tyser * 684ad6884SPeter Tyser * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ 784ad6884SPeter Tyser * 8fa82f871SAlbert ARIBAUD * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> 9fa82f871SAlbert ARIBAUD * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> 1084ad6884SPeter Tyser * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 1184ad6884SPeter Tyser * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 1284ad6884SPeter Tyser * Copyright (c) 2003 Kshitij <kshitij@ti.com> 1357b4bce9SAlbert ARIBAUD * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net> 1484ad6884SPeter Tyser * 1584ad6884SPeter Tyser * See file CREDITS for list of people who contributed to this 1684ad6884SPeter Tyser * project. 1784ad6884SPeter Tyser * 1884ad6884SPeter Tyser * This program is free software; you can redistribute it and/or 1984ad6884SPeter Tyser * modify it under the terms of the GNU General Public License as 2084ad6884SPeter Tyser * published by the Free Software Foundation; either version 2 of 2184ad6884SPeter Tyser * the License, or (at your option) any later version. 2284ad6884SPeter Tyser * 2384ad6884SPeter Tyser * This program is distributed in the hope that it will be useful, 2484ad6884SPeter Tyser * but WITHOUT ANY WARRANTY; without even the implied warranty of 2584ad6884SPeter Tyser * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2684ad6884SPeter Tyser * GNU General Public License for more details. 2784ad6884SPeter Tyser * 2884ad6884SPeter Tyser * You should have received a copy of the GNU General Public License 2984ad6884SPeter Tyser * along with this program; if not, write to the Free Software 3084ad6884SPeter Tyser * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 3184ad6884SPeter Tyser * MA 02111-1307 USA 3284ad6884SPeter Tyser */ 3384ad6884SPeter Tyser 3425ddd1fbSWolfgang Denk#include <asm-offsets.h> 3584ad6884SPeter Tyser#include <config.h> 3684ad6884SPeter Tyser#include <common.h> 3784ad6884SPeter Tyser#include <version.h> 3884ad6884SPeter Tyser 3984ad6884SPeter Tyser#if defined(CONFIG_OMAP1610) 4084ad6884SPeter Tyser#include <./configs/omap1510.h> 4184ad6884SPeter Tyser#elif defined(CONFIG_OMAP730) 4284ad6884SPeter Tyser#include <./configs/omap730.h> 4384ad6884SPeter Tyser#endif 4484ad6884SPeter Tyser 4584ad6884SPeter Tyser/* 4684ad6884SPeter Tyser ************************************************************************* 4784ad6884SPeter Tyser * 4884ad6884SPeter Tyser * Jump vector table as in table 3.1 in [1] 4984ad6884SPeter Tyser * 5084ad6884SPeter Tyser ************************************************************************* 5184ad6884SPeter Tyser */ 5284ad6884SPeter Tyser 5384ad6884SPeter Tyser 54*337c4333SHeiko Schocher#ifdef CONFIG_SYS_DV_NOR_BOOT_CFG 55*337c4333SHeiko Schocher.globl _start 56*337c4333SHeiko Schocher_start: 57*337c4333SHeiko Schocher.globl _NOR_BOOT_CFG 58*337c4333SHeiko Schocher_NOR_BOOT_CFG: 59*337c4333SHeiko Schocher .word CONFIG_SYS_DV_NOR_BOOT_CFG 60*337c4333SHeiko Schocher b reset 61*337c4333SHeiko Schocher#else 6284ad6884SPeter Tyser.globl _start 6384ad6884SPeter Tyser_start: 6484ad6884SPeter Tyser b reset 65*337c4333SHeiko Schocher#endif 66401bb30bSAneesh V#ifdef CONFIG_SPL_BUILD 6784ad6884SPeter Tyser/* No exception handlers in preloader */ 6884ad6884SPeter Tyser ldr pc, _hang 6984ad6884SPeter Tyser ldr pc, _hang 7084ad6884SPeter Tyser ldr pc, _hang 7184ad6884SPeter Tyser ldr pc, _hang 7284ad6884SPeter Tyser ldr pc, _hang 7384ad6884SPeter Tyser ldr pc, _hang 7484ad6884SPeter Tyser ldr pc, _hang 7584ad6884SPeter Tyser 7684ad6884SPeter Tyser_hang: 7784ad6884SPeter Tyser .word do_hang 7884ad6884SPeter Tyser/* pad to 64 byte boundary */ 7984ad6884SPeter Tyser .word 0x12345678 8084ad6884SPeter Tyser .word 0x12345678 8184ad6884SPeter Tyser .word 0x12345678 8284ad6884SPeter Tyser .word 0x12345678 8384ad6884SPeter Tyser .word 0x12345678 8484ad6884SPeter Tyser .word 0x12345678 8584ad6884SPeter Tyser .word 0x12345678 8684ad6884SPeter Tyser#else 8784ad6884SPeter Tyser ldr pc, _undefined_instruction 8884ad6884SPeter Tyser ldr pc, _software_interrupt 8984ad6884SPeter Tyser ldr pc, _prefetch_abort 9084ad6884SPeter Tyser ldr pc, _data_abort 9184ad6884SPeter Tyser ldr pc, _not_used 9284ad6884SPeter Tyser ldr pc, _irq 9384ad6884SPeter Tyser ldr pc, _fiq 9484ad6884SPeter Tyser 9584ad6884SPeter Tyser_undefined_instruction: 9684ad6884SPeter Tyser .word undefined_instruction 9784ad6884SPeter Tyser_software_interrupt: 9884ad6884SPeter Tyser .word software_interrupt 9984ad6884SPeter Tyser_prefetch_abort: 10084ad6884SPeter Tyser .word prefetch_abort 10184ad6884SPeter Tyser_data_abort: 10284ad6884SPeter Tyser .word data_abort 10384ad6884SPeter Tyser_not_used: 10484ad6884SPeter Tyser .word not_used 10584ad6884SPeter Tyser_irq: 10684ad6884SPeter Tyser .word irq 10784ad6884SPeter Tyser_fiq: 10884ad6884SPeter Tyser .word fiq 10984ad6884SPeter Tyser 110401bb30bSAneesh V#endif /* CONFIG_SPL_BUILD */ 11184ad6884SPeter Tyser .balignl 16,0xdeadbeef 11284ad6884SPeter Tyser 11384ad6884SPeter Tyser 11484ad6884SPeter Tyser/* 11584ad6884SPeter Tyser ************************************************************************* 11684ad6884SPeter Tyser * 11784ad6884SPeter Tyser * Startup Code (reset vector) 11884ad6884SPeter Tyser * 11984ad6884SPeter Tyser * do important init only if we don't start from memory! 12084ad6884SPeter Tyser * setup Memory and board specific bits prior to relocation. 12184ad6884SPeter Tyser * relocate armboot to ram 12284ad6884SPeter Tyser * setup stack 12384ad6884SPeter Tyser * 12484ad6884SPeter Tyser ************************************************************************* 12584ad6884SPeter Tyser */ 12684ad6884SPeter Tyser 127ab86f72cSHeiko Schocher.globl _TEXT_BASE 12884ad6884SPeter Tyser_TEXT_BASE: 12914d0a02aSWolfgang Denk .word CONFIG_SYS_TEXT_BASE 13084ad6884SPeter Tyser 13184ad6884SPeter Tyser/* 13284ad6884SPeter Tyser * These are defined in the board-specific linker script. 13392d5ecbaSAlbert Aribaud * Subtracting _start from them lets the linker put their 13492d5ecbaSAlbert Aribaud * relative position in the executable instead of leaving 13592d5ecbaSAlbert Aribaud * them null. 13684ad6884SPeter Tyser */ 13792d5ecbaSAlbert Aribaud.globl _bss_start_ofs 13892d5ecbaSAlbert Aribaud_bss_start_ofs: 13992d5ecbaSAlbert Aribaud .word __bss_start - _start 14084ad6884SPeter Tyser 14192d5ecbaSAlbert Aribaud.globl _bss_end_ofs 14292d5ecbaSAlbert Aribaud_bss_end_ofs: 14344c6e659SPo-Yu Chuang .word __bss_end__ - _start 14484ad6884SPeter Tyser 145f326cbbaSPo-Yu Chuang.globl _end_ofs 146f326cbbaSPo-Yu Chuang_end_ofs: 147f326cbbaSPo-Yu Chuang .word _end - _start 148f326cbbaSPo-Yu Chuang 14984ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ 15084ad6884SPeter Tyser/* IRQ stack memory (calculated at run-time) */ 15184ad6884SPeter Tyser.globl IRQ_STACK_START 15284ad6884SPeter TyserIRQ_STACK_START: 15384ad6884SPeter Tyser .word 0x0badc0de 15484ad6884SPeter Tyser 15584ad6884SPeter Tyser/* IRQ stack memory (calculated at run-time) */ 15684ad6884SPeter Tyser.globl FIQ_STACK_START 15784ad6884SPeter TyserFIQ_STACK_START: 15884ad6884SPeter Tyser .word 0x0badc0de 15984ad6884SPeter Tyser#endif 16084ad6884SPeter Tyser 161ab86f72cSHeiko Schocher/* IRQ stack memory (calculated at run-time) + 8 bytes */ 162ab86f72cSHeiko Schocher.globl IRQ_STACK_START_IN 163ab86f72cSHeiko SchocherIRQ_STACK_START_IN: 164ab86f72cSHeiko Schocher .word 0x0badc0de 16584ad6884SPeter Tyser 166ab86f72cSHeiko Schocher/* 167ab86f72cSHeiko Schocher * the actual reset code 168ab86f72cSHeiko Schocher */ 169ab86f72cSHeiko Schocher 170ab86f72cSHeiko Schocherreset: 171ab86f72cSHeiko Schocher /* 172ab86f72cSHeiko Schocher * set the cpu to SVC32 mode 173ab86f72cSHeiko Schocher */ 174ab86f72cSHeiko Schocher mrs r0,cpsr 175ab86f72cSHeiko Schocher bic r0,r0,#0x1f 176ab86f72cSHeiko Schocher orr r0,r0,#0xd3 177ab86f72cSHeiko Schocher msr cpsr,r0 178ab86f72cSHeiko Schocher 179ab86f72cSHeiko Schocher /* 180ab86f72cSHeiko Schocher * we do sys-critical inits only at reboot, 181ab86f72cSHeiko Schocher * not when booting from ram! 182ab86f72cSHeiko Schocher */ 183ab86f72cSHeiko Schocher#ifndef CONFIG_SKIP_LOWLEVEL_INIT 184ab86f72cSHeiko Schocher bl cpu_init_crit 185ab86f72cSHeiko Schocher#endif 186ab86f72cSHeiko Schocher 187ab86f72cSHeiko Schocher/* Set stackpointer in internal RAM to call board_init_f */ 188ab86f72cSHeiko Schochercall_board_init_f: 189ab86f72cSHeiko Schocher ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) 190296cae73SHeiko Schocher bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 191ab86f72cSHeiko Schocher ldr r0,=0x00000000 192ab86f72cSHeiko Schocher bl board_init_f 193ab86f72cSHeiko Schocher 194ab86f72cSHeiko Schocher/*------------------------------------------------------------------------------*/ 195ab86f72cSHeiko Schocher 196ab86f72cSHeiko Schocher/* 197ab86f72cSHeiko Schocher * void relocate_code (addr_sp, gd, addr_moni) 198ab86f72cSHeiko Schocher * 199ab86f72cSHeiko Schocher * This "function" does not return, instead it continues in RAM 200ab86f72cSHeiko Schocher * after relocating the monitor code. 201ab86f72cSHeiko Schocher * 202ab86f72cSHeiko Schocher */ 203ab86f72cSHeiko Schocher .globl relocate_code 204ab86f72cSHeiko Schocherrelocate_code: 205ab86f72cSHeiko Schocher mov r4, r0 /* save addr_sp */ 206ab86f72cSHeiko Schocher mov r5, r1 /* save addr of gd */ 207ab86f72cSHeiko Schocher mov r6, r2 /* save addr of destination */ 208ab86f72cSHeiko Schocher 209ab86f72cSHeiko Schocher /* Set up the stack */ 210ab86f72cSHeiko Schocherstack_setup: 211ab86f72cSHeiko Schocher mov sp, r4 212ab86f72cSHeiko Schocher 213ab86f72cSHeiko Schocher adr r0, _start 214a1a47d3cSAndreas Bießmann cmp r0, r6 215a1a47d3cSAndreas Bießmann beq clear_bss /* skip relocation */ 216a78fb68fSAndreas Bießmann mov r1, r6 /* r1 <- scratch for copy loop */ 21792d5ecbaSAlbert Aribaud ldr r3, _bss_start_ofs 21892d5ecbaSAlbert Aribaud add r2, r0, r3 /* r2 <- source end address */ 219ab86f72cSHeiko Schocher 220ab86f72cSHeiko Schochercopy_loop: 221ab86f72cSHeiko Schocher ldmia r0!, {r9-r10} /* copy from source address [r0] */ 222a78fb68fSAndreas Bießmann stmia r1!, {r9-r10} /* copy to target address [r1] */ 223da90d4ceSAlbert Aribaud cmp r0, r2 /* until source end address [r2] */ 224da90d4ceSAlbert Aribaud blo copy_loop 225ab86f72cSHeiko Schocher 226401bb30bSAneesh V#ifndef CONFIG_SPL_BUILD 22792d5ecbaSAlbert Aribaud /* 22892d5ecbaSAlbert Aribaud * fix .rel.dyn relocations 22992d5ecbaSAlbert Aribaud */ 23092d5ecbaSAlbert Aribaud ldr r0, _TEXT_BASE /* r0 <- Text base */ 231a78fb68fSAndreas Bießmann sub r9, r6, r0 /* r9 <- relocation offset */ 23292d5ecbaSAlbert Aribaud ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ 23392d5ecbaSAlbert Aribaud add r10, r10, r0 /* r10 <- sym table in FLASH */ 23492d5ecbaSAlbert Aribaud ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ 23592d5ecbaSAlbert Aribaud add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ 23692d5ecbaSAlbert Aribaud ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ 23792d5ecbaSAlbert Aribaud add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ 238ab86f72cSHeiko Schocherfixloop: 23992d5ecbaSAlbert Aribaud ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ 2408c0c2b90SGray Remlin add r0, r0, r9 /* r0 <- location to fix up in RAM */ 24192d5ecbaSAlbert Aribaud ldr r1, [r2, #4] 2421f52d89fSAndreas Bießmann and r7, r1, #0xff 2431f52d89fSAndreas Bießmann cmp r7, #23 /* relative fixup? */ 24492d5ecbaSAlbert Aribaud beq fixrel 2451f52d89fSAndreas Bießmann cmp r7, #2 /* absolute fixup? */ 24692d5ecbaSAlbert Aribaud beq fixabs 24792d5ecbaSAlbert Aribaud /* ignore unknown type of fixup */ 24892d5ecbaSAlbert Aribaud b fixnext 24992d5ecbaSAlbert Aribaudfixabs: 25092d5ecbaSAlbert Aribaud /* absolute fix: set location to (offset) symbol value */ 25192d5ecbaSAlbert Aribaud mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ 25292d5ecbaSAlbert Aribaud add r1, r10, r1 /* r1 <- address of symbol in table */ 25392d5ecbaSAlbert Aribaud ldr r1, [r1, #4] /* r1 <- symbol value */ 2543600945bSWolfgang Denk add r1, r1, r9 /* r1 <- relocated sym addr */ 25592d5ecbaSAlbert Aribaud b fixnext 25692d5ecbaSAlbert Aribaudfixrel: 25792d5ecbaSAlbert Aribaud /* relative fix: increase location by offset */ 25892d5ecbaSAlbert Aribaud ldr r1, [r0] 25992d5ecbaSAlbert Aribaud add r1, r1, r9 26092d5ecbaSAlbert Aribaudfixnext: 26192d5ecbaSAlbert Aribaud str r1, [r0] 26292d5ecbaSAlbert Aribaud add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ 263ab86f72cSHeiko Schocher cmp r2, r3 26492d5ecbaSAlbert Aribaud blo fixloop 265ab86f72cSHeiko Schocher#endif 266ab86f72cSHeiko Schocher 267ab86f72cSHeiko Schocherclear_bss: 268401bb30bSAneesh V#ifndef CONFIG_SPL_BUILD 26992d5ecbaSAlbert Aribaud ldr r0, _bss_start_ofs 27092d5ecbaSAlbert Aribaud ldr r1, _bss_end_ofs 271a78fb68fSAndreas Bießmann mov r4, r6 /* reloc addr */ 272ab86f72cSHeiko Schocher add r0, r0, r4 273ab86f72cSHeiko Schocher add r1, r1, r4 274ab86f72cSHeiko Schocher mov r2, #0x00000000 /* clear */ 275ab86f72cSHeiko Schocher 276ab86f72cSHeiko Schocherclbss_l:str r2, [r0] /* clear loop... */ 277ab86f72cSHeiko Schocher add r0, r0, #4 278ab86f72cSHeiko Schocher cmp r0, r1 279ab86f72cSHeiko Schocher bne clbss_l 280ab86f72cSHeiko Schocher 281ab86f72cSHeiko Schocher bl coloured_LED_init 2822d3be7c4SJason Kridner bl red_led_on 283ab86f72cSHeiko Schocher#endif 284ab86f72cSHeiko Schocher 285ab86f72cSHeiko Schocher/* 286ab86f72cSHeiko Schocher * We are done. Do not return, instead branch to second part of board 287ab86f72cSHeiko Schocher * initialization, now running from RAM. 288ab86f72cSHeiko Schocher */ 289ab86f72cSHeiko Schocher#ifdef CONFIG_NAND_SPL 29092d5ecbaSAlbert Aribaud ldr r0, _nand_boot_ofs 2919710504dSHeiko Schocher mov pc, r0 292ab86f72cSHeiko Schocher 2939710504dSHeiko Schocher_nand_boot_ofs: 2949710504dSHeiko Schocher .word nand_boot 295ab86f72cSHeiko Schocher#else 29692d5ecbaSAlbert Aribaud ldr r0, _board_init_r_ofs 2976087f1a9SAlexander Stein ldr r1, _TEXT_BASE 298123fb7deSDarius Augulis add lr, r0, r1 299123fb7deSDarius Augulis add lr, lr, r9 300ab86f72cSHeiko Schocher /* setup parameters for board_init_r */ 301ab86f72cSHeiko Schocher mov r0, r5 /* gd_t */ 302a78fb68fSAndreas Bießmann mov r1, r6 /* dest_addr */ 303ab86f72cSHeiko Schocher /* jump to it ... */ 304ab86f72cSHeiko Schocher mov pc, lr 305ab86f72cSHeiko Schocher 30692d5ecbaSAlbert Aribaud_board_init_r_ofs: 30792d5ecbaSAlbert Aribaud .word board_init_r - _start 308ab86f72cSHeiko Schocher#endif 309ab86f72cSHeiko Schocher 31092d5ecbaSAlbert Aribaud_rel_dyn_start_ofs: 31192d5ecbaSAlbert Aribaud .word __rel_dyn_start - _start 31292d5ecbaSAlbert Aribaud_rel_dyn_end_ofs: 31392d5ecbaSAlbert Aribaud .word __rel_dyn_end - _start 31492d5ecbaSAlbert Aribaud_dynsym_start_ofs: 31592d5ecbaSAlbert Aribaud .word __dynsym_start - _start 31692d5ecbaSAlbert Aribaud 31784ad6884SPeter Tyser/* 31884ad6884SPeter Tyser ************************************************************************* 31984ad6884SPeter Tyser * 32084ad6884SPeter Tyser * CPU_init_critical registers 32184ad6884SPeter Tyser * 32284ad6884SPeter Tyser * setup important registers 32384ad6884SPeter Tyser * setup memory timing 32484ad6884SPeter Tyser * 32584ad6884SPeter Tyser ************************************************************************* 32684ad6884SPeter Tyser */ 32784ad6884SPeter Tyser#ifndef CONFIG_SKIP_LOWLEVEL_INIT 32884ad6884SPeter Tysercpu_init_crit: 32984ad6884SPeter Tyser /* 33084ad6884SPeter Tyser * flush v4 I/D caches 33184ad6884SPeter Tyser */ 33284ad6884SPeter Tyser mov r0, #0 33384ad6884SPeter Tyser mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 33484ad6884SPeter Tyser mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 33584ad6884SPeter Tyser 33684ad6884SPeter Tyser /* 33784ad6884SPeter Tyser * disable MMU stuff and caches 33884ad6884SPeter Tyser */ 33984ad6884SPeter Tyser mrc p15, 0, r0, c1, c0, 0 34084ad6884SPeter Tyser bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ 34184ad6884SPeter Tyser bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ 34284ad6884SPeter Tyser orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ 34384ad6884SPeter Tyser orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ 34484ad6884SPeter Tyser mcr p15, 0, r0, c1, c0, 0 34584ad6884SPeter Tyser 34684ad6884SPeter Tyser /* 34784ad6884SPeter Tyser * Go setup Memory and board specific bits prior to relocation. 34884ad6884SPeter Tyser */ 34984ad6884SPeter Tyser mov ip, lr /* perserve link reg across call */ 35084ad6884SPeter Tyser bl lowlevel_init /* go setup pll,mux,memory */ 35184ad6884SPeter Tyser mov lr, ip /* restore link */ 35284ad6884SPeter Tyser mov pc, lr /* back to my caller */ 35384ad6884SPeter Tyser#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 35484ad6884SPeter Tyser 355401bb30bSAneesh V#ifndef CONFIG_SPL_BUILD 35684ad6884SPeter Tyser/* 35784ad6884SPeter Tyser ************************************************************************* 35884ad6884SPeter Tyser * 35984ad6884SPeter Tyser * Interrupt handling 36084ad6884SPeter Tyser * 36184ad6884SPeter Tyser ************************************************************************* 36284ad6884SPeter Tyser */ 36384ad6884SPeter Tyser 36484ad6884SPeter Tyser@ 36584ad6884SPeter Tyser@ IRQ stack frame. 36684ad6884SPeter Tyser@ 36784ad6884SPeter Tyser#define S_FRAME_SIZE 72 36884ad6884SPeter Tyser 36984ad6884SPeter Tyser#define S_OLD_R0 68 37084ad6884SPeter Tyser#define S_PSR 64 37184ad6884SPeter Tyser#define S_PC 60 37284ad6884SPeter Tyser#define S_LR 56 37384ad6884SPeter Tyser#define S_SP 52 37484ad6884SPeter Tyser 37584ad6884SPeter Tyser#define S_IP 48 37684ad6884SPeter Tyser#define S_FP 44 37784ad6884SPeter Tyser#define S_R10 40 37884ad6884SPeter Tyser#define S_R9 36 37984ad6884SPeter Tyser#define S_R8 32 38084ad6884SPeter Tyser#define S_R7 28 38184ad6884SPeter Tyser#define S_R6 24 38284ad6884SPeter Tyser#define S_R5 20 38384ad6884SPeter Tyser#define S_R4 16 38484ad6884SPeter Tyser#define S_R3 12 38584ad6884SPeter Tyser#define S_R2 8 38684ad6884SPeter Tyser#define S_R1 4 38784ad6884SPeter Tyser#define S_R0 0 38884ad6884SPeter Tyser 38984ad6884SPeter Tyser#define MODE_SVC 0x13 39084ad6884SPeter Tyser#define I_BIT 0x80 39184ad6884SPeter Tyser 39284ad6884SPeter Tyser/* 39384ad6884SPeter Tyser * use bad_save_user_regs for abort/prefetch/undef/swi ... 39484ad6884SPeter Tyser * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling 39584ad6884SPeter Tyser */ 39684ad6884SPeter Tyser 39784ad6884SPeter Tyser .macro bad_save_user_regs 39884ad6884SPeter Tyser @ carve out a frame on current user stack 39984ad6884SPeter Tyser sub sp, sp, #S_FRAME_SIZE 40084ad6884SPeter Tyser stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 401ab86f72cSHeiko Schocher ldr r2, IRQ_STACK_START_IN 40284ad6884SPeter Tyser @ get values for "aborted" pc and cpsr (into parm regs) 40384ad6884SPeter Tyser ldmia r2, {r2 - r3} 40484ad6884SPeter Tyser add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack 40584ad6884SPeter Tyser add r5, sp, #S_SP 40684ad6884SPeter Tyser mov r1, lr 40784ad6884SPeter Tyser stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr 40884ad6884SPeter Tyser mov r0, sp @ save current stack into r0 (param register) 40984ad6884SPeter Tyser .endm 41084ad6884SPeter Tyser 41184ad6884SPeter Tyser .macro irq_save_user_regs 41284ad6884SPeter Tyser sub sp, sp, #S_FRAME_SIZE 41384ad6884SPeter Tyser stmia sp, {r0 - r12} @ Calling r0-r12 41484ad6884SPeter Tyser @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good. 41584ad6884SPeter Tyser add r8, sp, #S_PC 41684ad6884SPeter Tyser stmdb r8, {sp, lr}^ @ Calling SP, LR 41784ad6884SPeter Tyser str lr, [r8, #0] @ Save calling PC 41884ad6884SPeter Tyser mrs r6, spsr 41984ad6884SPeter Tyser str r6, [r8, #4] @ Save CPSR 42084ad6884SPeter Tyser str r0, [r8, #8] @ Save OLD_R0 42184ad6884SPeter Tyser mov r0, sp 42284ad6884SPeter Tyser .endm 42384ad6884SPeter Tyser 42484ad6884SPeter Tyser .macro irq_restore_user_regs 42584ad6884SPeter Tyser ldmia sp, {r0 - lr}^ @ Calling r0 - lr 42684ad6884SPeter Tyser mov r0, r0 42784ad6884SPeter Tyser ldr lr, [sp, #S_PC] @ Get PC 42884ad6884SPeter Tyser add sp, sp, #S_FRAME_SIZE 42984ad6884SPeter Tyser subs pc, lr, #4 @ return & move spsr_svc into cpsr 43084ad6884SPeter Tyser .endm 43184ad6884SPeter Tyser 43284ad6884SPeter Tyser .macro get_bad_stack 433ab86f72cSHeiko Schocher ldr r13, IRQ_STACK_START_IN @ setup our mode stack 43484ad6884SPeter Tyser 43584ad6884SPeter Tyser str lr, [r13] @ save caller lr in position 0 of saved stack 43684ad6884SPeter Tyser mrs lr, spsr @ get the spsr 43784ad6884SPeter Tyser str lr, [r13, #4] @ save spsr in position 1 of saved stack 43884ad6884SPeter Tyser mov r13, #MODE_SVC @ prepare SVC-Mode 43984ad6884SPeter Tyser @ msr spsr_c, r13 44084ad6884SPeter Tyser msr spsr, r13 @ switch modes, make sure moves will execute 44184ad6884SPeter Tyser mov lr, pc @ capture return pc 44284ad6884SPeter Tyser movs pc, lr @ jump to next instruction & switch modes. 44384ad6884SPeter Tyser .endm 44484ad6884SPeter Tyser 44584ad6884SPeter Tyser .macro get_irq_stack @ setup IRQ stack 44684ad6884SPeter Tyser ldr sp, IRQ_STACK_START 44784ad6884SPeter Tyser .endm 44884ad6884SPeter Tyser 44984ad6884SPeter Tyser .macro get_fiq_stack @ setup FIQ stack 45084ad6884SPeter Tyser ldr sp, FIQ_STACK_START 45184ad6884SPeter Tyser .endm 452401bb30bSAneesh V#endif /* CONFIG_SPL_BUILD */ 45384ad6884SPeter Tyser 45484ad6884SPeter Tyser/* 45584ad6884SPeter Tyser * exception handlers 45684ad6884SPeter Tyser */ 457401bb30bSAneesh V#ifdef CONFIG_SPL_BUILD 45884ad6884SPeter Tyser .align 5 45984ad6884SPeter Tyserdo_hang: 46084ad6884SPeter Tyser ldr sp, _TEXT_BASE /* switch to abort stack */ 46184ad6884SPeter Tyser1: 46284ad6884SPeter Tyser bl 1b /* hang and never return */ 463401bb30bSAneesh V#else /* !CONFIG_SPL_BUILD */ 46484ad6884SPeter Tyser .align 5 46584ad6884SPeter Tyserundefined_instruction: 46684ad6884SPeter Tyser get_bad_stack 46784ad6884SPeter Tyser bad_save_user_regs 46884ad6884SPeter Tyser bl do_undefined_instruction 46984ad6884SPeter Tyser 47084ad6884SPeter Tyser .align 5 47184ad6884SPeter Tysersoftware_interrupt: 47284ad6884SPeter Tyser get_bad_stack 47384ad6884SPeter Tyser bad_save_user_regs 47484ad6884SPeter Tyser bl do_software_interrupt 47584ad6884SPeter Tyser 47684ad6884SPeter Tyser .align 5 47784ad6884SPeter Tyserprefetch_abort: 47884ad6884SPeter Tyser get_bad_stack 47984ad6884SPeter Tyser bad_save_user_regs 48084ad6884SPeter Tyser bl do_prefetch_abort 48184ad6884SPeter Tyser 48284ad6884SPeter Tyser .align 5 48384ad6884SPeter Tyserdata_abort: 48484ad6884SPeter Tyser get_bad_stack 48584ad6884SPeter Tyser bad_save_user_regs 48684ad6884SPeter Tyser bl do_data_abort 48784ad6884SPeter Tyser 48884ad6884SPeter Tyser .align 5 48984ad6884SPeter Tysernot_used: 49084ad6884SPeter Tyser get_bad_stack 49184ad6884SPeter Tyser bad_save_user_regs 49284ad6884SPeter Tyser bl do_not_used 49384ad6884SPeter Tyser 49484ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ 49584ad6884SPeter Tyser 49684ad6884SPeter Tyser .align 5 49784ad6884SPeter Tyserirq: 49884ad6884SPeter Tyser get_irq_stack 49984ad6884SPeter Tyser irq_save_user_regs 50084ad6884SPeter Tyser bl do_irq 50184ad6884SPeter Tyser irq_restore_user_regs 50284ad6884SPeter Tyser 50384ad6884SPeter Tyser .align 5 50484ad6884SPeter Tyserfiq: 50584ad6884SPeter Tyser get_fiq_stack 50684ad6884SPeter Tyser /* someone ought to write a more effiction fiq_save_user_regs */ 50784ad6884SPeter Tyser irq_save_user_regs 50884ad6884SPeter Tyser bl do_fiq 50984ad6884SPeter Tyser irq_restore_user_regs 51084ad6884SPeter Tyser 51184ad6884SPeter Tyser#else 51284ad6884SPeter Tyser 51384ad6884SPeter Tyser .align 5 51484ad6884SPeter Tyserirq: 51584ad6884SPeter Tyser get_bad_stack 51684ad6884SPeter Tyser bad_save_user_regs 51784ad6884SPeter Tyser bl do_irq 51884ad6884SPeter Tyser 51984ad6884SPeter Tyser .align 5 52084ad6884SPeter Tyserfiq: 52184ad6884SPeter Tyser get_bad_stack 52284ad6884SPeter Tyser bad_save_user_regs 52384ad6884SPeter Tyser bl do_fiq 52484ad6884SPeter Tyser 52584ad6884SPeter Tyser#endif 526401bb30bSAneesh V#endif /* CONFIG_SPL_BUILD */ 527