1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * armboot - Startup Code for ARM926EJS CPU-core 4 * 5 * Copyright (c) 2003 Texas Instruments 6 * 7 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ 8 * 9 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> 10 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> 11 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 12 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 13 * Copyright (c) 2003 Kshitij <kshitij@ti.com> 14 */ 15 16 17#include <config.h> 18 19/* 20 ************************************************************************* 21 * 22 * Startup Code (reset vector) 23 * 24 * Below are the critical initializations already taken place in BootROM. 25 * So, these are not taken care in Xloader 26 * 1. Relocation to RAM 27 * 2. Initializing stacks 28 * 29 ************************************************************************* 30 */ 31 32 .globl reset 33 34reset: 35/* 36 * Xloader has to return back to BootROM in a few cases. 37 * eg. Ethernet boot, UART boot, USB boot 38 * Saving registers for returning back 39 */ 40 stmdb sp!, {r0-r12,r14} 41 bl cpu_init_crit 42/* 43 * Clearing bss area is not done in Xloader. 44 * BSS area lies in the DDR location which is not yet initialized 45 * bss is assumed to be uninitialized. 46 */ 47 ldmia sp!, {r0-r12,pc} 48 49/* 50 ************************************************************************* 51 * 52 * CPU_init_critical registers 53 * 54 * setup important registers 55 * setup memory timing 56 * 57 ************************************************************************* 58 */ 59cpu_init_crit: 60 /* 61 * flush v4 I/D caches 62 */ 63 mov r0, #0 64 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 65 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 66 67 /* 68 * enable instruction cache 69 */ 70 mrc p15, 0, r0, c1, c0, 0 71 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ 72 mcr p15, 0, r0, c1, c0, 0 73 74 /* 75 * Go setup Memory and board specific bits prior to relocation. 76 */ 77 stmdb sp!, {lr} 78 bl _main /* _main will call board_init_f */ 79 ldmia sp!, {pc} 80