1 /* 2 * (C) Copyright 2009 3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <command.h> 10 #include <environment.h> 11 #include <i2c.h> 12 #include <net.h> 13 #include <linux/mtd/st_smi.h> 14 #include <asm/io.h> 15 #include <asm/arch/hardware.h> 16 #include <asm/arch/spr_emi.h> 17 #include <asm/arch/spr_defs.h> 18 19 #define CPU 0 20 #define DDR 1 21 #define SRAM_REL 0xD2801000 22 23 DECLARE_GLOBAL_DATA_PTR; 24 25 #if defined(CONFIG_CMD_NET) 26 static int i2c_read_mac(uchar *buffer); 27 #endif 28 29 int dram_init(void) 30 { 31 /* Store complete RAM size and return */ 32 gd->ram_size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_MAXSIZE); 33 34 return 0; 35 } 36 37 int dram_init_banksize(void) 38 { 39 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 40 gd->bd->bi_dram[0].size = gd->ram_size; 41 42 return 0; 43 } 44 45 int board_early_init_f() 46 { 47 #if defined(CONFIG_ST_SMI) 48 smi_init(); 49 #endif 50 return 0; 51 } 52 int misc_init_r(void) 53 { 54 #if defined(CONFIG_CMD_NET) 55 uchar mac_id[6]; 56 57 if (!eth_env_get_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id)) 58 eth_env_set_enetaddr("ethaddr", mac_id); 59 #endif 60 env_set("verify", "n"); 61 62 #if defined(CONFIG_SPEAR_USBTTY) 63 env_set("stdin", "usbtty"); 64 env_set("stdout", "usbtty"); 65 env_set("stderr", "usbtty"); 66 67 #ifndef CONFIG_SYS_NO_DCACHE 68 dcache_enable(); 69 #endif 70 #endif 71 return 0; 72 } 73 74 #ifdef CONFIG_SPEAR_EMI 75 struct cust_emi_para { 76 unsigned int tap; 77 unsigned int tsdp; 78 unsigned int tdpw; 79 unsigned int tdpr; 80 unsigned int tdcs; 81 }; 82 83 /* EMI timing setting of m28w640hc of linux kernel */ 84 const struct cust_emi_para emi_timing_m28w640hc = { 85 .tap = 0x10, 86 .tsdp = 0x05, 87 .tdpw = 0x0a, 88 .tdpr = 0x0a, 89 .tdcs = 0x05, 90 }; 91 92 /* EMI timing setting of bootrom */ 93 const struct cust_emi_para emi_timing_bootrom = { 94 .tap = 0xf, 95 .tsdp = 0x0, 96 .tdpw = 0xff, 97 .tdpr = 0x111, 98 .tdcs = 0x02, 99 }; 100 101 void spear_emi_init(void) 102 { 103 const struct cust_emi_para *p = &emi_timing_m28w640hc; 104 struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE; 105 unsigned int cs; 106 unsigned int val, tmp; 107 108 val = readl(CONFIG_SPEAR_RASBASE); 109 110 if (val & EMI_ACKMSK) 111 tmp = 0x3f; 112 else 113 tmp = 0x0; 114 115 writel(tmp, &emi_regs_p->ack); 116 117 for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) { 118 writel(p->tap, &emi_regs_p->bank_regs[cs].tap); 119 writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp); 120 writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw); 121 writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr); 122 writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs); 123 writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3), 124 &emi_regs_p->bank_regs[cs].control); 125 } 126 } 127 #endif 128 129 int spear_board_init(ulong mach_type) 130 { 131 gd->bd->bi_arch_number = mach_type; 132 133 /* adress of boot parameters */ 134 gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR; 135 136 #ifdef CONFIG_SPEAR_EMI 137 spear_emi_init(); 138 #endif 139 return 0; 140 } 141 142 #if defined(CONFIG_CMD_NET) 143 static int i2c_read_mac(uchar *buffer) 144 { 145 u8 buf[2]; 146 147 i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN); 148 149 /* Check if mac in i2c memory is valid */ 150 if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) { 151 /* Valid mac address is saved in i2c eeprom */ 152 i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN); 153 return 0; 154 } 155 156 return -1; 157 } 158 159 static int write_mac(uchar *mac) 160 { 161 u8 buf[2]; 162 163 buf[0] = (u8)MAGIC_BYTE0; 164 buf[1] = (u8)MAGIC_BYTE1; 165 i2c_write(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN); 166 167 buf[0] = (u8)~MAGIC_BYTE0; 168 buf[1] = (u8)~MAGIC_BYTE1; 169 170 i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN); 171 172 /* check if valid MAC address is saved in I2C EEPROM or not? */ 173 if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) { 174 i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN); 175 puts("I2C EEPROM written with mac address \n"); 176 return 0; 177 } 178 179 puts("I2C EEPROM writing failed\n"); 180 return -1; 181 } 182 #endif 183 184 int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 185 { 186 void (*sram_setfreq) (unsigned int, unsigned int); 187 unsigned int frequency; 188 #if defined(CONFIG_CMD_NET) 189 unsigned char mac[6]; 190 #endif 191 192 if ((argc > 3) || (argc < 2)) 193 return cmd_usage(cmdtp); 194 195 if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) { 196 197 frequency = simple_strtoul(argv[2], NULL, 0); 198 199 if (frequency > 333) { 200 printf("Frequency is limited to 333MHz\n"); 201 return 1; 202 } 203 204 sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz); 205 206 if (!strcmp(argv[1], "cpufreq")) { 207 sram_setfreq(CPU, frequency); 208 printf("CPU frequency changed to %u\n", frequency); 209 } else { 210 sram_setfreq(DDR, frequency); 211 printf("DDR frequency changed to %u\n", frequency); 212 } 213 214 return 0; 215 216 #if defined(CONFIG_CMD_NET) 217 } else if (!strcmp(argv[1], "ethaddr")) { 218 219 u32 reg; 220 char *e, *s = argv[2]; 221 for (reg = 0; reg < 6; ++reg) { 222 mac[reg] = s ? simple_strtoul(s, &e, 16) : 0; 223 if (s) 224 s = (*e) ? e + 1 : e; 225 } 226 write_mac(mac); 227 228 return 0; 229 #endif 230 } else if (!strcmp(argv[1], "print")) { 231 #if defined(CONFIG_CMD_NET) 232 if (!i2c_read_mac(mac)) { 233 printf("Ethaddr (from i2c mem) = %pM\n", mac); 234 } else { 235 printf("Ethaddr (from i2c mem) = Not set\n"); 236 } 237 #endif 238 return 0; 239 } 240 241 return cmd_usage(cmdtp); 242 } 243 244 U_BOOT_CMD(chip_config, 3, 1, do_chip_config, 245 "configure chip", 246 "chip_config cpufreq/ddrfreq frequency\n" 247 #if defined(CONFIG_CMD_NET) 248 "chip_config ethaddr XX:XX:XX:XX:XX:XX\n" 249 #endif 250 "chip_config print"); 251