xref: /openbmc/u-boot/arch/arm/cpu/arm926ejs/spear/cpu.c (revision 87a62bce)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2010
4  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5  */
6 
7 #include <common.h>
8 #include <asm/io.h>
9 #include <asm/arch/hardware.h>
10 #include <asm/arch/spr_misc.h>
11 
12 int arch_cpu_init(void)
13 {
14 	struct misc_regs *const misc_p =
15 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
16 	u32 periph1_clken, periph_clk_cfg;
17 
18 	periph1_clken = readl(&misc_p->periph1_clken);
19 
20 #if defined(CONFIG_SPEAR3XX)
21 	periph1_clken |= MISC_GPT2ENB;
22 #elif defined(CONFIG_SPEAR600)
23 	periph1_clken |= MISC_GPT3ENB;
24 #endif
25 
26 #if defined(CONFIG_PL011_SERIAL)
27 	periph1_clken |= MISC_UART0ENB;
28 
29 	periph_clk_cfg = readl(&misc_p->periph_clk_cfg);
30 	periph_clk_cfg &= ~CONFIG_SPEAR_UARTCLKMSK;
31 	periph_clk_cfg |= CONFIG_SPEAR_UART48M;
32 	writel(periph_clk_cfg, &misc_p->periph_clk_cfg);
33 #endif
34 #if defined(CONFIG_ETH_DESIGNWARE)
35 	periph1_clken |= MISC_ETHENB;
36 #endif
37 #if defined(CONFIG_DW_UDC)
38 	periph1_clken |= MISC_USBDENB;
39 #endif
40 #if defined(CONFIG_SYS_I2C_DW)
41 	periph1_clken |= MISC_I2CENB;
42 #endif
43 #if defined(CONFIG_ST_SMI)
44 	periph1_clken |= MISC_SMIENB;
45 #endif
46 #if defined(CONFIG_NAND_FSMC)
47 	periph1_clken |= MISC_FSMCENB;
48 #endif
49 #if defined(CONFIG_USB_EHCI_SPEAR)
50 	periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2;
51 #endif
52 
53 	writel(periph1_clken, &misc_p->periph1_clken);
54 
55 	return 0;
56 }
57 
58 void enable_caches(void)
59 {
60 #ifndef CONFIG_SYS_ICACHE_OFF
61 	icache_enable();
62 #endif
63 #ifndef CONFIG_SYS_DCACHE_OFF
64 	dcache_enable();
65 #endif
66 }
67 
68 #ifdef CONFIG_DISPLAY_CPUINFO
69 int print_cpuinfo(void)
70 {
71 #ifdef CONFIG_SPEAR300
72 	printf("CPU:   SPEAr300\n");
73 #elif defined(CONFIG_SPEAR310)
74 	printf("CPU:   SPEAr310\n");
75 #elif defined(CONFIG_SPEAR320)
76 	printf("CPU:   SPEAr320\n");
77 #elif defined(CONFIG_SPEAR600)
78 	printf("CPU:   SPEAr600\n");
79 #else
80 #error CPU not supported in spear platform
81 #endif
82 	return 0;
83 }
84 #endif
85 
86 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) && defined(CONFIG_NAND_FSMC)
87 static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,
88 			 char *const argv[])
89 {
90 	if (argc != 2)
91 		goto usage;
92 
93 	if (strncmp(argv[1], "hw", 2) == 0) {
94 		/* 1-bit HW ECC */
95 		printf("Switching to 1-bit HW ECC\n");
96 		fsmc_nand_switch_ecc(1);
97 	} else if (strncmp(argv[1], "bch4", 2) == 0) {
98 		/* 4-bit SW ECC BCH4 */
99 		printf("Switching to 4-bit SW ECC (BCH4)\n");
100 		fsmc_nand_switch_ecc(4);
101 	} else {
102 		goto usage;
103 	}
104 
105 	return 0;
106 
107 usage:
108 	printf("Usage: nandecc %s\n", cmdtp->usage);
109 	return 1;
110 }
111 
112 U_BOOT_CMD(
113 	nandecc, 2, 0,	do_switch_ecc,
114 	"switch NAND ECC calculation algorithm",
115 	"hw|bch4 - Switch between NAND hardware 1-bit HW and"
116 	" 4-bit SW BCH\n"
117 );
118 #endif
119