1/* 2 * armboot - Startup Code for ARM926EJS CPU-core 3 * 4 * Copyright (c) 2003 Texas Instruments 5 * 6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ 7 * 8 * Copyright (c) 2001 Marius Groger <mag@sysgo.de> 9 * Copyright (c) 2002 Alex Zupke <azu@sysgo.de> 10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 12 * Copyright (c) 2003 Kshitij <kshitij@ti.com> 13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net> 14 * 15 * Change to support call back into iMX28 bootrom 16 * Copyright (c) 2011 Marek Vasut <marek.vasut@gmail.com> 17 * on behalf of DENX Software Engineering GmbH 18 * 19 * SPDX-License-Identifier: GPL-2.0+ 20 */ 21 22#include <asm-offsets.h> 23#include <config.h> 24#include <common.h> 25#include <version.h> 26 27/* 28 ************************************************************************* 29 * 30 * Jump vector table as in table 3.1 in [1] 31 * 32 ************************************************************************* 33 */ 34 35 36.globl _start 37_start: 38 b reset 39 b undefined_instruction 40 b software_interrupt 41 b prefetch_abort 42 b data_abort 43 b not_used 44 b irq 45 b fiq 46 47/* 48 * Vector table, located at address 0x20. 49 * This table allows the code running AFTER SPL, the U-Boot, to install it's 50 * interrupt handlers here. The problem is that the U-Boot is loaded into RAM, 51 * including it's interrupt vectoring table and the table at 0x0 is still the 52 * SPLs. So if interrupt happens in U-Boot, the SPLs interrupt vectoring table 53 * is still used. 54 */ 55_vt_reset: 56 .word _reset 57_vt_undefined_instruction: 58 .word _hang 59_vt_software_interrupt: 60 .word _hang 61_vt_prefetch_abort: 62 .word _hang 63_vt_data_abort: 64 .word _hang 65_vt_not_used: 66 .word _reset 67_vt_irq: 68 .word _hang 69_vt_fiq: 70 .word _hang 71 72reset: 73 ldr pc, _vt_reset 74undefined_instruction: 75 ldr pc, _vt_undefined_instruction 76software_interrupt: 77 ldr pc, _vt_software_interrupt 78prefetch_abort: 79 ldr pc, _vt_prefetch_abort 80data_abort: 81 ldr pc, _vt_data_abort 82not_used: 83 ldr pc, _vt_not_used 84irq: 85 ldr pc, _vt_irq 86fiq: 87 ldr pc, _vt_fiq 88 89 .balignl 16,0xdeadbeef 90 91/* 92 ************************************************************************* 93 * 94 * Startup Code (reset vector) 95 * 96 * do important init only if we don't start from memory! 97 * setup Memory and board specific bits prior to relocation. 98 * relocate armboot to ram 99 * setup stack 100 * 101 ************************************************************************* 102 */ 103 104.globl _TEXT_BASE 105_TEXT_BASE: 106#ifdef CONFIG_SPL_TEXT_BASE 107 .word CONFIG_SPL_TEXT_BASE 108#else 109 .word CONFIG_SYS_TEXT_BASE 110#endif 111 112/* 113 * These are defined in the board-specific linker script. 114 * Subtracting _start from them lets the linker put their 115 * relative position in the executable instead of leaving 116 * them null. 117 */ 118.globl _bss_start_ofs 119_bss_start_ofs: 120 .word __bss_start - _start 121 122.globl _bss_end_ofs 123_bss_end_ofs: 124 .word __bss_end - _start 125 126.globl _end_ofs 127_end_ofs: 128 .word _end - _start 129 130#ifdef CONFIG_USE_IRQ 131/* IRQ stack memory (calculated at run-time) */ 132.globl IRQ_STACK_START 133IRQ_STACK_START: 134 .word 0x0badc0de 135 136/* IRQ stack memory (calculated at run-time) */ 137.globl FIQ_STACK_START 138FIQ_STACK_START: 139 .word 0x0badc0de 140#endif 141 142/* IRQ stack memory (calculated at run-time) + 8 bytes */ 143.globl IRQ_STACK_START_IN 144IRQ_STACK_START_IN: 145 .word 0x0badc0de 146 147/* 148 * the actual reset code 149 */ 150 151_reset: 152 /* 153 * Store all registers on old stack pointer, this will allow us later to 154 * return to the BootROM and let the BootROM load U-Boot into RAM. 155 */ 156 push {r0-r12,r14} 157 158 /* save control register c1 */ 159 mrc p15, 0, r0, c1, c0, 0 160 push {r0} 161 162 /* 163 * set the cpu to SVC32 mode and store old CPSR register content 164 */ 165 mrs r0,cpsr 166 push {r0} 167 bic r0,r0,#0x1f 168 orr r0,r0,#0xd3 169 msr cpsr,r0 170 171 bl board_init_ll 172 173 /* 174 * restore bootrom's cpu mode (especially FIQ) 175 */ 176 pop {r0} 177 msr cpsr,r0 178 179 /* 180 * restore c1 register 181 * (especially set exception vector location back to 182 * bootrom space which is required by bootrom for USB boot) 183 */ 184 pop {r0} 185 mcr p15, 0, r0, c1, c0, 0 186 187 pop {r0-r12,r14} 188 bx lr 189 190_hang: 191 ldr sp, _TEXT_BASE /* switch to abort stack */ 1921: 193 bl 1b /* hang and never return */ 194