xref: /openbmc/u-boot/arch/arm/cpu/arm926ejs/mx27/reset.c (revision c6af2e7d)
1 /*
2  * (C) Copyright 2002
3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4  * Marius Groeger <mgroeger@sysgo.de>
5  *
6  * (C) Copyright 2002
7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8  * Alex Zuepke <azu@sysgo.de>
9  *
10  * (C) Copyright 2002
11  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
12  *
13  * (C) Copyright 2009
14  * Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
15  *
16  * See file CREDITS for list of people who contributed to this
17  * project.
18  *
19  * This program is free software; you can redistribute it and/or
20  * modify it under the terms of the GNU General Public License as
21  * published by the Free Software Foundation; either version 2 of
22  * the License, or (at your option) any later version.
23  *
24  * This program is distributed in the hope that it will be useful,
25  * but WITHOUT ANY WARRANTY; without even the implied warranty of
26  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
27  * GNU General Public License for more details.
28  *
29  * You should have received a copy of the GNU General Public License
30  * along with this program; if not, write to the Free Software
31  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32  * MA 02111-1307 USA
33  */
34 
35 #include <common.h>
36 #include <asm/io.h>
37 #include <asm/arch/imx-regs.h>
38 
39 /*
40  * Reset the cpu by setting up the watchdog timer and let it time out
41  */
42 void reset_cpu(ulong ignored)
43 {
44 	struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
45 	/* Disable watchdog and set Time-Out field to 0 */
46 	writel(0x00000000, &regs->wcr);
47 
48 	/* Write Service Sequence */
49 	writel(0x00005555, &regs->wsr);
50 	writel(0x0000AAAA, &regs->wsr);
51 
52 	/* Enable watchdog */
53 	writel(WCR_WDE, &regs->wcr);
54 
55 	while (1);
56 	/*NOTREACHED*/
57 }
58