1/*
2 *  relocate - i.MX27-specific vector relocation
3 *
4 *  Copyright (c) 2013  Albert ARIBAUD <albert.u.boot@aribaud.net>
5 *
6 * SPDX-License-Identifier:	GPL-2.0+
7 */
8
9#include <asm-offsets.h>
10#include <config.h>
11#include <linux/linkage.h>
12
13/*
14 * The i.MX27 SoC is very specific with respect to exceptions: it
15 * does not provide RAM at the high vectors address (0xFFFF0000),
16 * thus only the low address (0x00000000) is useable; but that is
17 * in ROM. Therefore, vectors cannot be changed at all.
18 *
19 * However, these ROM-based vectors actually just perform indirect
20 * calls through pointers located in RAM at SoC-specific addresses,
21 * as follows:
22 *
23 * Offset      Exception              Use by ROM code
24 * 0x00000000  reset                  indirect branch to [0x00000014]
25 * 0x00000004  undefined instruction  indirect branch to [0xfffffef0]
26 * 0x00000008  software interrupt     indirect branch to [0xfffffef4]
27 * 0x0000000c  prefetch abort         indirect branch to [0xfffffef8]
28 * 0x00000010  data abort             indirect branch to [0xfffffefc]
29 * 0x00000014  (reserved in ARMv5)    vector to ROM reset: 0xc0000000
30 * 0x00000018  IRQ                    indirect branch to [0xffffff00]
31 * 0x0000001c  FIQ                    indirect branch to [0xffffff04]
32 *
33 * In order to initialize exceptions on i.MX27, we must copy U-Boot's
34 * indirect (not exception!) vector table into 0xfffffef0..0xffffff04
35 * taking care not to copy vectors number 5 (reserved exception).
36 */
37
38	.section	.text.relocate_vectors,"ax",%progbits
39
40ENTRY(relocate_vectors)
41
42	ldr	r0, [r9, #GD_RELOCADDR]	/* r0 = gd->relocaddr */
43	ldr	r1, =32			/* size of vector table */
44	add	r0, r0, r1		/* skip to indirect table */
45	ldr	r1, =0xFFFFFEF0		/* i.MX27 indirect table */
46	ldmia	r0!, {r2-r8}		/* load indirect vectors 1..7 */
47	stmia	r1!, {r2-r5, r7,r8}	/* write all but vector 5 */
48
49	bx	lr
50
51ENDPROC(relocate_vectors)
52