xref: /openbmc/u-boot/arch/arm/cpu/arm926ejs/mx25/reset.c (revision 274bced8)
1 /*
2  * (C) Copyright 2002
3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4  * Marius Groeger <mgroeger@sysgo.de>
5  *
6  * (C) Copyright 2002
7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8  * Alex Zuepke <azu@sysgo.de>
9  *
10  * (C) Copyright 2002
11  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
12  *
13  * (C) Copyright 2009
14  * Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
15  *
16  * SPDX-License-Identifier:	GPL-2.0+
17  */
18 
19 #include <common.h>
20 #include <asm/io.h>
21 #include <asm/arch/imx-regs.h>
22 
23 /*
24  * Reset the cpu by setting up the watchdog timer and let it time out
25  */
26 void reset_cpu(ulong ignored)
27 {
28 	struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
29 	/* Disable watchdog and set Time-Out field to 0 */
30 	writew(0, &regs->wcr);
31 
32 	/* Write Service Sequence */
33 	writew(WSR_UNLOCK1, &regs->wsr);
34 	writew(WSR_UNLOCK2, &regs->wsr);
35 
36 	/* Enable watchdog */
37 	writew(WCR_WDE, &regs->wcr);
38 
39 	while (1) ;
40 }
41