xref: /openbmc/u-boot/arch/arm/cpu/arm926ejs/cache.c (revision 12308b12)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2011
4  * Ilya Yanok, EmCraft Systems
5  */
6 #include <linux/types.h>
7 #include <common.h>
8 
9 #ifndef CONFIG_SYS_DCACHE_OFF
10 void invalidate_dcache_all(void)
11 {
12 	asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
13 }
14 
15 void flush_dcache_all(void)
16 {
17 	asm volatile(
18 		"0:"
19 		"mrc p15, 0, r15, c7, c14, 3\n"
20 		"bne 0b\n"
21 		"mcr p15, 0, %0, c7, c10, 4\n"
22 		 : : "r"(0) : "memory"
23 	);
24 }
25 
26 void invalidate_dcache_range(unsigned long start, unsigned long stop)
27 {
28 	if (!check_cache_range(start, stop))
29 		return;
30 
31 	while (start < stop) {
32 		asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));
33 		start += CONFIG_SYS_CACHELINE_SIZE;
34 	}
35 }
36 
37 void flush_dcache_range(unsigned long start, unsigned long stop)
38 {
39 	if (!check_cache_range(start, stop))
40 		return;
41 
42 	while (start < stop) {
43 		asm volatile("mcr p15, 0, %0, c7, c14, 1\n" : : "r"(start));
44 		start += CONFIG_SYS_CACHELINE_SIZE;
45 	}
46 
47 	asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0));
48 }
49 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
50 void invalidate_dcache_all(void)
51 {
52 }
53 
54 void flush_dcache_all(void)
55 {
56 }
57 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
58 
59 /*
60  * Stub implementations for l2 cache operations
61  */
62 
63 __weak void l2_cache_disable(void) {}
64 
65 #if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
66 __weak void invalidate_l2_cache(void) {}
67 #endif
68