1/* 2 * armboot - Startup Code for ARM920 CPU-core 3 * 4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> 5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> 6 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11#include <asm-offsets.h> 12#include <common.h> 13#include <config.h> 14 15/* 16 ************************************************************************* 17 * 18 * Startup Code (called from the ARM reset exception vector) 19 * 20 * do important init only if we don't start from memory! 21 * relocate armboot to ram 22 * setup stack 23 * jump to second stage 24 * 25 ************************************************************************* 26 */ 27 28 .globl reset 29 30reset: 31 /* 32 * set the cpu to SVC32 mode 33 */ 34 mrs r0, cpsr 35 bic r0, r0, #0x1f 36 orr r0, r0, #0xd3 37 msr cpsr, r0 38 39#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) 40 /* 41 * relocate exception table 42 */ 43 ldr r0, =_start 44 ldr r1, =0x0 45 mov r2, #16 46copyex: 47 subs r2, r2, #1 48 ldr r3, [r0], #4 49 str r3, [r1], #4 50 bne copyex 51#endif 52 53 /* 54 * we do sys-critical inits only at reboot, 55 * not when booting from ram! 56 */ 57#ifndef CONFIG_SKIP_LOWLEVEL_INIT 58 bl cpu_init_crit 59#endif 60 61 bl _main 62 63/*------------------------------------------------------------------------------*/ 64 65 .globl c_runtime_cpu_setup 66c_runtime_cpu_setup: 67 68 mov pc, lr 69 70/* 71 ************************************************************************* 72 * 73 * CPU_init_critical registers 74 * 75 * setup important registers 76 * setup memory timing 77 * 78 ************************************************************************* 79 */ 80 81 82#ifndef CONFIG_SKIP_LOWLEVEL_INIT 83cpu_init_crit: 84 /* 85 * flush v4 I/D caches 86 */ 87 mov r0, #0 88 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 89 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 90 91 /* 92 * disable MMU stuff and caches 93 */ 94 mrc p15, 0, r0, c1, c0, 0 95 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) 96 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) 97 orr r0, r0, #0x00000002 @ set bit 1 (A) Align 98 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache 99 mcr p15, 0, r0, c1, c0, 0 100 101#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY 102 /* 103 * before relocating, we have to setup RAM timing 104 * because memory timing is board-dependend, you will 105 * find a lowlevel_init.S in your board directory. 106 */ 107 mov ip, lr 108 109 bl lowlevel_init 110 mov lr, ip 111#endif 112 mov pc, lr 113#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 114