1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * armboot - Startup Code for ARM920 CPU-core 4 * 5 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> 6 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> 7 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 8 */ 9 10#include <asm-offsets.h> 11#include <common.h> 12#include <config.h> 13 14/* 15 ************************************************************************* 16 * 17 * Startup Code (called from the ARM reset exception vector) 18 * 19 * do important init only if we don't start from memory! 20 * relocate armboot to ram 21 * setup stack 22 * jump to second stage 23 * 24 ************************************************************************* 25 */ 26 27 .globl reset 28 29reset: 30 /* 31 * set the cpu to SVC32 mode 32 */ 33 mrs r0, cpsr 34 bic r0, r0, #0x1f 35 orr r0, r0, #0xd3 36 msr cpsr, r0 37 38#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) 39 /* 40 * relocate exception table 41 */ 42 ldr r0, =_start 43 ldr r1, =0x0 44 mov r2, #16 45copyex: 46 subs r2, r2, #1 47 ldr r3, [r0], #4 48 str r3, [r1], #4 49 bne copyex 50#endif 51 52 /* 53 * we do sys-critical inits only at reboot, 54 * not when booting from ram! 55 */ 56#ifndef CONFIG_SKIP_LOWLEVEL_INIT 57 bl cpu_init_crit 58#endif 59 60 bl _main 61 62/*------------------------------------------------------------------------------*/ 63 64 .globl c_runtime_cpu_setup 65c_runtime_cpu_setup: 66 67 mov pc, lr 68 69/* 70 ************************************************************************* 71 * 72 * CPU_init_critical registers 73 * 74 * setup important registers 75 * setup memory timing 76 * 77 ************************************************************************* 78 */ 79 80 81#ifndef CONFIG_SKIP_LOWLEVEL_INIT 82cpu_init_crit: 83 /* 84 * flush v4 I/D caches 85 */ 86 mov r0, #0 87 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 88 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 89 90 /* 91 * disable MMU stuff and caches 92 */ 93 mrc p15, 0, r0, c1, c0, 0 94 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) 95 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) 96 orr r0, r0, #0x00000002 @ set bit 1 (A) Align 97 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache 98 mcr p15, 0, r0, c1, c0, 0 99 100#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY 101 /* 102 * before relocating, we have to setup RAM timing 103 * because memory timing is board-dependend, you will 104 * find a lowlevel_init.S in your board directory. 105 */ 106 mov ip, lr 107 108 bl lowlevel_init 109 mov lr, ip 110#endif 111 mov pc, lr 112#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 113