xref: /openbmc/u-boot/arch/arm/cpu/arm920t/imx/timer.c (revision a3b36c84)
1 /*
2  * (C) Copyright 2002
3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4  * Marius Groeger <mgroeger@sysgo.de>
5  *
6  * (C) Copyright 2002
7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8  * Alex Zuepke <azu@sysgo.de>
9  *
10  * (C) Copyright 2002
11  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
12  *
13  * SPDX-License-Identifier:	GPL-2.0+
14  */
15 
16 #include <common.h>
17 #if defined (CONFIG_IMX)
18 
19 #include <asm/arch/imx-regs.h>
20 
21 int timer_init (void)
22 {
23 	int i;
24 	/* setup GP Timer 1 */
25 	TCTL1 = TCTL_SWR;
26 	for ( i=0; i<100; i++) TCTL1 = 0; /* We have no udelay by now */
27 	TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
28 	TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
29 
30 	/* Reset the timer */
31 	TCTL1 &= ~TCTL_TEN;
32 	TCTL1 |= TCTL_TEN; /* Enable timer */
33 
34 	return (0);
35 }
36 
37 /*
38  * timer without interrupts
39  */
40 ulong get_timer (ulong base)
41 {
42 	return get_timer_masked() - base;
43 }
44 
45 ulong get_timer_masked (void)
46 {
47 	return TCN1;
48 }
49 
50 void udelay_masked (unsigned long usec)
51 {
52 	ulong endtime = get_timer_masked() + usec;
53 	signed long diff;
54 
55 	do {
56 		ulong now = get_timer_masked ();
57 		diff = endtime - now;
58 	} while (diff >= 0);
59 }
60 
61 void __udelay (unsigned long usec)
62 {
63 	udelay_masked(usec);
64 }
65 
66 /*
67  * This function is derived from PowerPC code (read timebase as long long).
68  * On ARM it just returns the timer value.
69  */
70 unsigned long long get_ticks(void)
71 {
72 	return get_timer(0);
73 }
74 
75 /*
76  * This function is derived from PowerPC code (timebase clock frequency).
77  * On ARM it returns the number of timer ticks per second.
78  */
79 ulong get_tbclk (void)
80 {
81 	return CONFIG_SYS_HZ;
82 }
83 
84 /*
85  * Reset the cpu by setting up the watchdog timer and let him time out
86  */
87 void reset_cpu (ulong ignored)
88 {
89 	/* Disable watchdog and set Time-Out field to 0 */
90 	WCR = 0x00000000;
91 
92 	/* Write Service Sequence */
93 	WSR = 0x00005555;
94 	WSR = 0x0000AAAA;
95 
96 	/* Enable watchdog */
97 	WCR = 0x00000001;
98 
99 	while (1);
100 	/*NOTREACHED*/
101 }
102 
103 #endif /* defined (CONFIG_IMX) */
104