1 /* 2 * 3 * (c) 2004 Sascha Hauer <sascha@saschahauer.de> 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 25 #include <common.h> 26 #if defined (CONFIG_IMX) 27 28 #include <asm/arch/imx-regs.h> 29 30 /* ------------------------------------------------------------------------- */ 31 /* NOTE: This describes the proper use of this file. 32 * 33 * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. 34 * SH FIXME: 16780000 in our case 35 * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of 36 * the specified bus in HZ. 37 */ 38 /* ------------------------------------------------------------------------- */ 39 40 ulong get_systemPLLCLK(void) 41 { 42 /* FIXME: We assume System_SEL = 0 here */ 43 u32 spctl0 = SPCTL0; 44 u32 mfi = (spctl0 >> 10) & 0xf; 45 u32 mfn = spctl0 & 0x3f; 46 u32 mfd = (spctl0 >> 16) & 0x3f; 47 u32 pd = (spctl0 >> 26) & 0xf; 48 49 mfi = mfi<=5 ? 5 : mfi; 50 51 return (2*(CONFIG_SYSPLL_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); 52 } 53 54 ulong get_mcuPLLCLK(void) 55 { 56 /* FIXME: We assume System_SEL = 0 here */ 57 u32 mpctl0 = MPCTL0; 58 u32 mfi = (mpctl0 >> 10) & 0xf; 59 u32 mfn = mpctl0 & 0x3f; 60 u32 mfd = (mpctl0 >> 16) & 0x3f; 61 u32 pd = (mpctl0 >> 26) & 0xf; 62 63 mfi = mfi<=5 ? 5 : mfi; 64 65 return (2*(CONFIG_SYS_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); 66 } 67 68 ulong get_FCLK(void) 69 { 70 return (( CSCR>>15)&1) ? get_mcuPLLCLK()>>1 : get_mcuPLLCLK(); 71 } 72 73 /* return HCLK frequency */ 74 ulong get_HCLK(void) 75 { 76 u32 bclkdiv = (( CSCR >> 10 ) & 0xf) + 1; 77 printf("bclkdiv: %d\n", bclkdiv); 78 return get_systemPLLCLK() / bclkdiv; 79 } 80 81 /* return BCLK frequency */ 82 ulong get_BCLK(void) 83 { 84 return get_HCLK(); 85 } 86 87 ulong get_PERCLK1(void) 88 { 89 return get_systemPLLCLK() / (((PCDR) & 0xf)+1); 90 } 91 92 ulong get_PERCLK2(void) 93 { 94 return get_systemPLLCLK() / (((PCDR>>4) & 0xf)+1); 95 } 96 97 ulong get_PERCLK3(void) 98 { 99 return get_systemPLLCLK() / (((PCDR>>16) & 0x7f)+1); 100 } 101 102 #endif /* defined (CONFIG_IMX) */ 103