1 /* 2 * Cirrus Logic EP93xx CPU-specific support. 3 * 4 * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> 5 * 6 * Copyright (C) 2004, 2005 7 * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com> 8 * 9 * See file CREDITS for list of people who contributed to this project. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 18 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 19 * for more details. 20 * 21 * You should have received a copy of the GNU General Public License along 22 * with this program; if not, write to the Free Software Foundation, Inc., 23 * 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26 #include <common.h> 27 #include <asm/arch/ep93xx.h> 28 #include <asm/io.h> 29 30 /* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */ 31 extern void reset_cpu(ulong addr) 32 { 33 struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; 34 uint32_t value; 35 36 /* Unlock DeviceCfg and set SWRST */ 37 writel(0xAA, &syscon->sysswlock); 38 value = readl(&syscon->devicecfg); 39 value |= SYSCON_DEVICECFG_SWRST; 40 writel(value, &syscon->devicecfg); 41 42 /* Unlock DeviceCfg and clear SWRST */ 43 writel(0xAA, &syscon->sysswlock); 44 value = readl(&syscon->devicecfg); 45 value &= ~SYSCON_DEVICECFG_SWRST; 46 writel(value, &syscon->devicecfg); 47 48 /* Dying... */ 49 while (1) 50 ; /* noop */ 51 } 52