1/* 2 * armboot - Startup Code for ARM1176 CPU-core 3 * 4 * Copyright (c) 2007 Samsung Electronics 5 * 6 * Copyright (C) 2008 7 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 * 27 * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com) 28 * 2007-09-21 - Added MoviNAND and OneNAND boot codes by 29 * jsgood (jsgood.yang@samsung.com) 30 * Base codes by scsuh (sc.suh) 31 */ 32 33#include <asm-offsets.h> 34#include <config.h> 35#include <version.h> 36#ifdef CONFIG_ENABLE_MMU 37#include <asm/proc/domain.h> 38#endif 39 40#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE) 41#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE 42#endif 43 44/* 45 ************************************************************************* 46 * 47 * Jump vector table as in table 3.1 in [1] 48 * 49 ************************************************************************* 50 */ 51 52.globl _start 53_start: b reset 54#ifndef CONFIG_NAND_SPL 55 ldr pc, _undefined_instruction 56 ldr pc, _software_interrupt 57 ldr pc, _prefetch_abort 58 ldr pc, _data_abort 59 ldr pc, _not_used 60 ldr pc, _irq 61 ldr pc, _fiq 62 63_undefined_instruction: 64 .word undefined_instruction 65_software_interrupt: 66 .word software_interrupt 67_prefetch_abort: 68 .word prefetch_abort 69_data_abort: 70 .word data_abort 71_not_used: 72 .word not_used 73_irq: 74 .word irq 75_fiq: 76 .word fiq 77_pad: 78 .word 0x12345678 /* now 16*4=64 */ 79#else 80 . = _start + 64 81#endif 82 83.global _end_vect 84_end_vect: 85 .balignl 16,0xdeadbeef 86/* 87 ************************************************************************* 88 * 89 * Startup Code (reset vector) 90 * 91 * do important init only if we don't start from memory! 92 * setup Memory and board specific bits prior to relocation. 93 * relocate armboot to ram 94 * setup stack 95 * 96 ************************************************************************* 97 */ 98 99.globl _TEXT_BASE 100_TEXT_BASE: 101 .word CONFIG_SYS_TEXT_BASE 102 103/* 104 * Below variable is very important because we use MMU in U-Boot. 105 * Without it, we cannot run code correctly before MMU is ON. 106 * by scsuh. 107 */ 108_TEXT_PHY_BASE: 109 .word CONFIG_SYS_PHY_UBOOT_BASE 110 111/* 112 * These are defined in the board-specific linker script. 113 * Subtracting _start from them lets the linker put their 114 * relative position in the executable instead of leaving 115 * them null. 116 */ 117 118.globl _bss_start_ofs 119_bss_start_ofs: 120 .word __bss_start - _start 121 122.globl _bss_end_ofs 123_bss_end_ofs: 124 .word __bss_end__ - _start 125 126.globl _end_ofs 127_end_ofs: 128 .word _end - _start 129 130/* IRQ stack memory (calculated at run-time) + 8 bytes */ 131.globl IRQ_STACK_START_IN 132IRQ_STACK_START_IN: 133 .word 0x0badc0de 134 135/* 136 * the actual reset code 137 */ 138 139reset: 140 /* 141 * set the cpu to SVC32 mode 142 */ 143 mrs r0, cpsr 144 bic r0, r0, #0x3f 145 orr r0, r0, #0xd3 146 msr cpsr, r0 147 148/* 149 ************************************************************************* 150 * 151 * CPU_init_critical registers 152 * 153 * setup important registers 154 * setup memory timing 155 * 156 ************************************************************************* 157 */ 158 /* 159 * we do sys-critical inits only at reboot, 160 * not when booting from ram! 161 */ 162cpu_init_crit: 163 /* 164 * When booting from NAND - it has definitely been a reset, so, no need 165 * to flush caches and disable the MMU 166 */ 167#ifndef CONFIG_NAND_SPL 168 /* 169 * flush v4 I/D caches 170 */ 171 mov r0, #0 172 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 173 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 174 175 /* 176 * disable MMU stuff and caches 177 */ 178 mrc p15, 0, r0, c1, c0, 0 179 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) 180 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) 181 orr r0, r0, #0x00000002 @ set bit 2 (A) Align 182 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache 183 184 /* Prepare to disable the MMU */ 185 adr r2, mmu_disable_phys 186 sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE) 187 b mmu_disable 188 189 .align 5 190 /* Run in a single cache-line */ 191mmu_disable: 192 mcr p15, 0, r0, c1, c0, 0 193 nop 194 nop 195 mov pc, r2 196mmu_disable_phys: 197 198#ifdef CONFIG_DISABLE_TCM 199 /* 200 * Disable the TCMs 201 */ 202 mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */ 203 cmp r0, #0 204 beq skip_tcmdisable 205 mov r1, #0 206 mov r2, #1 207 tst r0, r2 208 mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/ 209 tst r0, r2, LSL #16 210 mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/ 211skip_tcmdisable: 212#endif 213#endif 214 215#ifdef CONFIG_PERIPORT_REMAP 216 /* Peri port setup */ 217 ldr r0, =CONFIG_PERIPORT_BASE 218 orr r0, r0, #CONFIG_PERIPORT_SIZE 219 mcr p15,0,r0,c15,c2,4 220#endif 221 222 /* 223 * Go setup Memory and board specific bits prior to relocation. 224 */ 225 bl lowlevel_init /* go setup pll,mux,memory */ 226 227/* Set stackpointer in internal RAM to call board_init_f */ 228call_board_init_f: 229 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) 230 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 231 ldr r0,=0x00000000 232 bl board_init_f 233 234/*------------------------------------------------------------------------------*/ 235 236/* 237 * void relocate_code (addr_sp, gd, addr_moni) 238 * 239 * This "function" does not return, instead it continues in RAM 240 * after relocating the monitor code. 241 * 242 */ 243 .globl relocate_code 244relocate_code: 245 mov r4, r0 /* save addr_sp */ 246 mov r5, r1 /* save addr of gd */ 247 mov r6, r2 /* save addr of destination */ 248 249 /* Set up the stack */ 250stack_setup: 251 mov sp, r4 252 253 adr r0, _start 254 cmp r0, r6 255 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ 256 beq clear_bss /* skip relocation */ 257 mov r1, r6 /* r1 <- scratch for copy_loop */ 258 ldr r3, _bss_start_ofs 259 add r2, r0, r3 /* r2 <- source end address */ 260 261copy_loop: 262 ldmia r0!, {r9-r10} /* copy from source address [r0] */ 263 stmia r1!, {r9-r10} /* copy to target address [r1] */ 264 cmp r0, r2 /* until source end address [r2] */ 265 blo copy_loop 266 267#ifndef CONFIG_SPL_BUILD 268 /* 269 * fix .rel.dyn relocations 270 */ 271 ldr r0, _TEXT_BASE /* r0 <- Text base */ 272 sub r9, r6, r0 /* r9 <- relocation offset */ 273 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ 274 add r10, r10, r0 /* r10 <- sym table in FLASH */ 275 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ 276 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ 277 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ 278 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ 279fixloop: 280 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ 281 add r0, r0, r9 /* r0 <- location to fix up in RAM */ 282 ldr r1, [r2, #4] 283 and r7, r1, #0xff 284 cmp r7, #23 /* relative fixup? */ 285 beq fixrel 286 cmp r7, #2 /* absolute fixup? */ 287 beq fixabs 288 /* ignore unknown type of fixup */ 289 b fixnext 290fixabs: 291 /* absolute fix: set location to (offset) symbol value */ 292 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ 293 add r1, r10, r1 /* r1 <- address of symbol in table */ 294 ldr r1, [r1, #4] /* r1 <- symbol value */ 295 add r1, r1, r9 /* r1 <- relocated sym addr */ 296 b fixnext 297fixrel: 298 /* relative fix: increase location by offset */ 299 ldr r1, [r0] 300 add r1, r1, r9 301fixnext: 302 str r1, [r0] 303 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ 304 cmp r2, r3 305 blo fixloop 306#endif 307 308#ifdef CONFIG_ENABLE_MMU 309enable_mmu: 310 /* enable domain access */ 311 ldr r5, =0x0000ffff 312 mcr p15, 0, r5, c3, c0, 0 /* load domain access register */ 313 314 /* Set the TTB register */ 315 ldr r0, _mmu_table_base 316 ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE 317 ldr r2, =0xfff00000 318 bic r0, r0, r2 319 orr r1, r0, r1 320 mcr p15, 0, r1, c2, c0, 0 321 322 /* Enable the MMU */ 323 mrc p15, 0, r0, c1, c0, 0 324 orr r0, r0, #1 /* Set CR_M to enable MMU */ 325 326 /* Prepare to enable the MMU */ 327 adr r1, skip_hw_init 328 and r1, r1, #0x3fc 329 ldr r2, _TEXT_BASE 330 ldr r3, =0xfff00000 331 and r2, r2, r3 332 orr r2, r2, r1 333 b mmu_enable 334 335 .align 5 336 /* Run in a single cache-line */ 337mmu_enable: 338 339 mcr p15, 0, r0, c1, c0, 0 340 nop 341 nop 342 mov pc, r2 343skip_hw_init: 344#endif 345 346clear_bss: 347#ifndef CONFIG_SPL_BUILD 348 ldr r0, _bss_start_ofs 349 ldr r1, _bss_end_ofs 350 mov r4, r6 /* reloc addr */ 351 add r0, r0, r4 352 add r1, r1, r4 353 mov r2, #0x00000000 /* clear */ 354 355clbss_l:cmp r0, r1 /* clear loop... */ 356 bhs clbss_e /* if reached end of bss, exit */ 357 str r2, [r0] 358 add r0, r0, #4 359 b clbss_l 360clbss_e: 361#ifndef CONFIG_NAND_SPL 362 bl coloured_LED_init 363 bl red_led_on 364#endif 365#endif 366 367/* 368 * We are done. Do not return, instead branch to second part of board 369 * initialization, now running from RAM. 370 */ 371#ifdef CONFIG_NAND_SPL 372 ldr pc, _nand_boot 373 374_nand_boot: .word nand_boot 375#else 376 ldr r0, _board_init_r_ofs 377 adr r1, _start 378 add lr, r0, r1 379 add lr, lr, r9 380 /* setup parameters for board_init_r */ 381 mov r0, r5 /* gd_t */ 382 mov r1, r6 /* dest_addr */ 383 /* jump to it ... */ 384 mov pc, lr 385 386_board_init_r_ofs: 387 .word board_init_r - _start 388#endif 389 390_rel_dyn_start_ofs: 391 .word __rel_dyn_start - _start 392_rel_dyn_end_ofs: 393 .word __rel_dyn_end - _start 394_dynsym_start_ofs: 395 .word __dynsym_start - _start 396 397#ifdef CONFIG_ENABLE_MMU 398_mmu_table_base: 399 .word mmu_table 400#endif 401 402#ifndef CONFIG_NAND_SPL 403/* 404 * we assume that cache operation is done before. (eg. cleanup_before_linux()) 405 * actually, we don't need to do anything about cache if not use d-cache in 406 * U-Boot. So, in this function we clean only MMU. by scsuh 407 * 408 * void theLastJump(void *kernel, int arch_num, uint boot_params); 409 */ 410#ifdef CONFIG_ENABLE_MMU 411 .globl theLastJump 412theLastJump: 413 mov r9, r0 414 ldr r3, =0xfff00000 415 ldr r4, _TEXT_PHY_BASE 416 adr r5, phy_last_jump 417 bic r5, r5, r3 418 orr r5, r5, r4 419 mov pc, r5 420phy_last_jump: 421 /* 422 * disable MMU stuff 423 */ 424 mrc p15, 0, r0, c1, c0, 0 425 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ 426 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ 427 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ 428 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ 429 mcr p15, 0, r0, c1, c0, 0 430 431 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 432 433 mov r0, #0 434 mov pc, r9 435#endif 436 437 438/* 439 ************************************************************************* 440 * 441 * Interrupt handling 442 * 443 ************************************************************************* 444 */ 445@ 446@ IRQ stack frame. 447@ 448#define S_FRAME_SIZE 72 449 450#define S_OLD_R0 68 451#define S_PSR 64 452#define S_PC 60 453#define S_LR 56 454#define S_SP 52 455 456#define S_IP 48 457#define S_FP 44 458#define S_R10 40 459#define S_R9 36 460#define S_R8 32 461#define S_R7 28 462#define S_R6 24 463#define S_R5 20 464#define S_R4 16 465#define S_R3 12 466#define S_R2 8 467#define S_R1 4 468#define S_R0 0 469 470#define MODE_SVC 0x13 471#define I_BIT 0x80 472 473/* 474 * use bad_save_user_regs for abort/prefetch/undef/swi ... 475 */ 476 477 .macro bad_save_user_regs 478 /* carve out a frame on current user stack */ 479 sub sp, sp, #S_FRAME_SIZE 480 /* Save user registers (now in svc mode) r0-r12 */ 481 stmia sp, {r0 - r12} 482 483 ldr r2, IRQ_STACK_START_IN 484 /* get values for "aborted" pc and cpsr (into parm regs) */ 485 ldmia r2, {r2 - r3} 486 /* grab pointer to old stack */ 487 add r0, sp, #S_FRAME_SIZE 488 489 add r5, sp, #S_SP 490 mov r1, lr 491 /* save sp_SVC, lr_SVC, pc, cpsr */ 492 stmia r5, {r0 - r3} 493 /* save current stack into r0 (param register) */ 494 mov r0, sp 495 .endm 496 497 .macro get_bad_stack 498 ldr r13, IRQ_STACK_START_IN @ setup our mode stack 499 500 /* save caller lr in position 0 of saved stack */ 501 str lr, [r13] 502 /* get the spsr */ 503 mrs lr, spsr 504 /* save spsr in position 1 of saved stack */ 505 str lr, [r13, #4] 506 507 /* prepare SVC-Mode */ 508 mov r13, #MODE_SVC 509 @ msr spsr_c, r13 510 /* switch modes, make sure moves will execute */ 511 msr spsr, r13 512 /* capture return pc */ 513 mov lr, pc 514 /* jump to next instruction & switch modes. */ 515 movs pc, lr 516 .endm 517 518 .macro get_bad_stack_swi 519 /* space on current stack for scratch reg. */ 520 sub r13, r13, #4 521 /* save R0's value. */ 522 str r0, [r13] 523 ldr r13, IRQ_STACK_START_IN @ setup our mode stack 524 /* save caller lr in position 0 of saved stack */ 525 str lr, [r0] 526 /* get the spsr */ 527 mrs r0, spsr 528 /* save spsr in position 1 of saved stack */ 529 str lr, [r0, #4] 530 /* restore r0 */ 531 ldr r0, [r13] 532 /* pop stack entry */ 533 add r13, r13, #4 534 .endm 535 536/* 537 * exception handlers 538 */ 539 .align 5 540undefined_instruction: 541 get_bad_stack 542 bad_save_user_regs 543 bl do_undefined_instruction 544 545 .align 5 546software_interrupt: 547 get_bad_stack_swi 548 bad_save_user_regs 549 bl do_software_interrupt 550 551 .align 5 552prefetch_abort: 553 get_bad_stack 554 bad_save_user_regs 555 bl do_prefetch_abort 556 557 .align 5 558data_abort: 559 get_bad_stack 560 bad_save_user_regs 561 bl do_data_abort 562 563 .align 5 564not_used: 565 get_bad_stack 566 bad_save_user_regs 567 bl do_not_used 568 569 .align 5 570irq: 571 get_bad_stack 572 bad_save_user_regs 573 bl do_irq 574 575 .align 5 576fiq: 577 get_bad_stack 578 bad_save_user_regs 579 bl do_fiq 580#endif /* CONFIG_NAND_SPL */ 581