xref: /openbmc/u-boot/arch/arm/cpu/arm1136/mx35/timer.c (revision 4e3349b6)
1 /*
2  * (C) Copyright 2007
3  * Sascha Hauer, Pengutronix
4  *
5  * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #include <common.h>
27 #include <asm/io.h>
28 #include <div64.h>
29 #include <asm/arch/imx-regs.h>
30 #include <asm/arch/clock.h>
31 
32 DECLARE_GLOBAL_DATA_PTR;
33 
34 #define timestamp	(gd->tbl)
35 #define lastinc		(gd->lastinc)
36 
37 /* General purpose timers bitfields */
38 #define GPTCR_SWR       (1<<15)	/* Software reset */
39 #define GPTCR_FRR       (1<<9)	/* Freerun / restart */
40 #define GPTCR_CLKSOURCE_32   (0x100<<6)	/* Clock source */
41 #define GPTCR_CLKSOURCE_IPG (0x001<<6)	/* Clock source */
42 #define GPTCR_TEN       (1)	/* Timer enable */
43 
44 #define	TIMER_FREQ_HZ	mxc_get_clock(MXC_IPG_CLK)
45 
46 static inline unsigned long long tick_to_time(unsigned long long tick)
47 {
48 	tick *= CONFIG_SYS_HZ;
49 	do_div(tick, TIMER_FREQ_HZ);
50 
51 	return tick;
52 }
53 
54 static inline unsigned long long us_to_tick(unsigned long long usec)
55 {
56 	usec *= TIMER_FREQ_HZ;
57 	do_div(usec, 1000000);
58 
59 	return usec;
60 }
61 
62 int timer_init(void)
63 {
64 	int i;
65 	struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
66 
67 	/* setup GP Timer 1 */
68 	writel(GPTCR_SWR, &gpt->ctrl);
69 	for (i = 0; i < 100; i++)
70 		writel(0, &gpt->ctrl);	/* We have no udelay by now */
71 
72 	writel(0, &gpt->pre);
73 	/* Freerun Mode, PERCLK1 input */
74 	writel(readl(&gpt->ctrl) |
75 		GPTCR_CLKSOURCE_IPG | GPTCR_TEN,
76 		&gpt->ctrl);
77 
78 	return 0;
79 }
80 
81 unsigned long long get_ticks(void)
82 {
83 	struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
84 	ulong now = readl(&gpt->counter); /* current tick value */
85 
86 	if (now >= lastinc) {
87 		/*
88 		 * normal mode (non roll)
89 		 * move stamp forward with absolut diff ticks
90 		 */
91 		timestamp += (now - lastinc);
92 	} else {
93 		/* we have rollover of incrementer */
94 		timestamp += (0xFFFFFFFF - lastinc) + now;
95 	}
96 	lastinc = now;
97 	return timestamp;
98 }
99 
100 ulong get_timer_masked(void)
101 {
102 	/*
103 	 * get_ticks() returns a long long (64 bit), it wraps in
104 	 * 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
105 	 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
106 	 * 5 * 10^6 days - long enough.
107 	 */
108 	return tick_to_time(get_ticks());
109 }
110 
111 ulong get_timer(ulong base)
112 {
113 	return get_timer_masked() - base;
114 }
115 
116 /* delay x useconds AND preserve advance timstamp value */
117 void __udelay(unsigned long usec)
118 {
119 	unsigned long long tmp;
120 	ulong tmo;
121 
122 	tmo = us_to_tick(usec);
123 	tmp = get_ticks() + tmo;	/* get current timestamp */
124 
125 	while (get_ticks() < tmp)	/* loop till event */
126 		 /*NOP*/;
127 }
128 
129 /*
130  * This function is derived from PowerPC code (timebase clock frequency).
131  * On ARM it returns the number of timer ticks per second.
132  */
133 ulong get_tbclk(void)
134 {
135 	return TIMER_FREQ_HZ;
136 }
137