1 /* 2 * (C) Copyright 2007 3 * Sascha Hauer, Pengutronix 4 * 5 * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <asm/io.h> 12 #include <asm/arch/imx-regs.h> 13 #include <asm/arch/crm_regs.h> 14 15 /* General purpose timers bitfields */ 16 #define GPTCR_SWR (1<<15) /* Software reset */ 17 #define GPTCR_FRR (1<<9) /* Freerun / restart */ 18 #define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */ 19 #define GPTCR_TEN (1) /* Timer enable */ 20 21 /* 22 * nothing really to do with interrupts, just starts up a counter. 23 * The 32KHz 32-bit timer overruns in 134217 seconds 24 */ 25 int timer_init(void) 26 { 27 int i; 28 struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR; 29 struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR; 30 31 /* setup GP Timer 1 */ 32 writel(GPTCR_SWR, &gpt->ctrl); 33 34 writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1); 35 36 for (i = 0; i < 100; i++) 37 writel(0, &gpt->ctrl); /* We have no udelay by now */ 38 writel(0, &gpt->pre); /* prescaler = 1 */ 39 /* Freerun Mode, 32KHz input */ 40 writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR, 41 &gpt->ctrl); 42 writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl); 43 44 return 0; 45 } 46