xref: /openbmc/u-boot/arch/arm/cpu/arm1136/mx31/timer.c (revision e246b728)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2007
4  * Sascha Hauer, Pengutronix
5  */
6 
7 #include <common.h>
8 #include <asm/arch/imx-regs.h>
9 #include <asm/io.h>
10 
11 #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
12 
13 /* General purpose timers registers */
14 #define GPTCR	__REG(TIMER_BASE)		/* Control register	*/
15 #define GPTPR	__REG(TIMER_BASE + 0x4)		/* Prescaler register	*/
16 #define GPTSR	__REG(TIMER_BASE + 0x8)		/* Status register	*/
17 #define GPTCNT	__REG(TIMER_BASE + 0x24)	/* Counter register	*/
18 
19 /* General purpose timers bitfields */
20 #define GPTCR_SWR		(1 << 15)	/* Software reset	*/
21 #define GPTCR_FRR		(1 << 9)	/* Freerun / restart	*/
22 #define GPTCR_CLKSOURCE_32	(4 << 6)	/* Clock source		*/
23 #define GPTCR_TEN		1		/* Timer enable		*/
24 
25 /* The 32768Hz 32-bit timer overruns in 131072 seconds */
26 int timer_init(void)
27 {
28 	int i;
29 
30 	/* setup GP Timer 1 */
31 	GPTCR = GPTCR_SWR;
32 	for (i = 0; i < 100; i++)
33 		GPTCR = 0; /* We have no udelay by now */
34 	GPTPR = 0; /* 32Khz */
35 	/* Freerun Mode, PERCLK1 input */
36 	GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
37 
38 	return 0;
39 }
40 
41 unsigned long timer_read_counter(void)
42 {
43 	return GPTCNT;
44 }
45