xref: /openbmc/u-boot/arch/arm/cpu/arm1136/mx31/timer.c (revision c9aa831e)
1 /*
2  * (C) Copyright 2007
3  * Sascha Hauer, Pengutronix
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 #include <common.h>
25 #include <asm/arch/imx-regs.h>
26 #include <asm/arch/clock.h>
27 #include <div64.h>
28 #include <watchdog.h>
29 #include <asm/io.h>
30 
31 #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
32 
33 /* General purpose timers registers */
34 #define GPTCR	__REG(TIMER_BASE)		/* Control register	*/
35 #define GPTPR	__REG(TIMER_BASE + 0x4)		/* Prescaler register	*/
36 #define GPTSR	__REG(TIMER_BASE + 0x8)		/* Status register	*/
37 #define GPTCNT	__REG(TIMER_BASE + 0x24)	/* Counter register	*/
38 
39 /* General purpose timers bitfields */
40 #define GPTCR_SWR		(1 << 15)	/* Software reset	*/
41 #define GPTCR_FRR		(1 << 9)	/* Freerun / restart	*/
42 #define GPTCR_CLKSOURCE_32	(4 << 6)	/* Clock source		*/
43 #define GPTCR_TEN		1		/* Timer enable		*/
44 
45 DECLARE_GLOBAL_DATA_PTR;
46 
47 /*
48  * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
49  * "tick" is internal timer period
50  */
51 
52 #ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
53 /* ~0.4% error - measured with stop-watch on 100s boot-delay */
54 static inline unsigned long long tick_to_time(unsigned long long tick)
55 {
56 	tick *= CONFIG_SYS_HZ;
57 	do_div(tick, MXC_CLK32);
58 	return tick;
59 }
60 
61 static inline unsigned long long time_to_tick(unsigned long long time)
62 {
63 	time *= MXC_CLK32;
64 	do_div(time, CONFIG_SYS_HZ);
65 	return time;
66 }
67 
68 static inline unsigned long long us_to_tick(unsigned long long us)
69 {
70 	us = us * MXC_CLK32 + 999999;
71 	do_div(us, 1000000);
72 	return us;
73 }
74 #else
75 /* ~2% error */
76 #define TICK_PER_TIME	((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
77 #define US_PER_TICK	(1000000 / MXC_CLK32)
78 
79 static inline unsigned long long tick_to_time(unsigned long long tick)
80 {
81 	do_div(tick, TICK_PER_TIME);
82 	return tick;
83 }
84 
85 static inline unsigned long long time_to_tick(unsigned long long time)
86 {
87 	return time * TICK_PER_TIME;
88 }
89 
90 static inline unsigned long long us_to_tick(unsigned long long us)
91 {
92 	us += US_PER_TICK - 1;
93 	do_div(us, US_PER_TICK);
94 	return us;
95 }
96 #endif
97 
98 /* The 32768Hz 32-bit timer overruns in 131072 seconds */
99 int timer_init(void)
100 {
101 	int i;
102 
103 	/* setup GP Timer 1 */
104 	GPTCR = GPTCR_SWR;
105 	for (i = 0; i < 100; i++)
106 		GPTCR = 0; /* We have no udelay by now */
107 	GPTPR = 0; /* 32Khz */
108 	/* Freerun Mode, PERCLK1 input */
109 	GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
110 
111 	return 0;
112 }
113 
114 unsigned long long get_ticks(void)
115 {
116 	ulong now = GPTCNT; /* current tick value */
117 
118 	if (now >= gd->arch.lastinc)	/* normal mode (non roll) */
119 		/* move stamp forward with absolut diff ticks */
120 		gd->arch.tbl += (now - gd->arch.lastinc);
121 	else			/* we have rollover of incrementer */
122 		gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
123 	gd->arch.lastinc = now;
124 	return gd->arch.tbl;
125 }
126 
127 ulong get_timer_masked(void)
128 {
129 	/*
130 	 * get_ticks() returns a long long (64 bit), it wraps in
131 	 * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
132 	 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
133 	 * 5 * 10^6 days - long enough.
134 	 */
135 	return tick_to_time(get_ticks());
136 }
137 
138 ulong get_timer(ulong base)
139 {
140 	return get_timer_masked() - base;
141 }
142 
143 /* delay x useconds AND preserve advance timestamp value */
144 void __udelay(unsigned long usec)
145 {
146 	unsigned long long tmp;
147 	ulong tmo;
148 
149 	tmo = us_to_tick(usec);
150 	tmp = get_ticks() + tmo;	/* get current timestamp */
151 
152 	while (get_ticks() < tmp)	/* loop till event */
153 		 /*NOP*/;
154 }
155 
156 /*
157  * This function is derived from PowerPC code (timebase clock frequency).
158  * On ARM it returns the number of timer ticks per second.
159  */
160 ulong get_tbclk(void)
161 {
162 	return MXC_CLK32;
163 }
164