1 /* 2 * (C) Copyright 2007 3 * Sascha Hauer, Pengutronix 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <asm/arch/imx-regs.h> 10 #include <asm/arch/clock.h> 11 #include <div64.h> 12 #include <watchdog.h> 13 #include <asm/io.h> 14 15 #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */ 16 17 /* General purpose timers registers */ 18 #define GPTCR __REG(TIMER_BASE) /* Control register */ 19 #define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */ 20 #define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */ 21 #define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */ 22 23 /* General purpose timers bitfields */ 24 #define GPTCR_SWR (1 << 15) /* Software reset */ 25 #define GPTCR_FRR (1 << 9) /* Freerun / restart */ 26 #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */ 27 #define GPTCR_TEN 1 /* Timer enable */ 28 29 DECLARE_GLOBAL_DATA_PTR; 30 31 /* 32 * "time" is measured in 1 / CONFIG_SYS_HZ seconds, 33 * "tick" is internal timer period 34 */ 35 36 #ifdef CONFIG_MX31_TIMER_HIGH_PRECISION 37 /* ~0.4% error - measured with stop-watch on 100s boot-delay */ 38 static inline unsigned long long tick_to_time(unsigned long long tick) 39 { 40 tick *= CONFIG_SYS_HZ; 41 do_div(tick, MXC_CLK32); 42 return tick; 43 } 44 45 static inline unsigned long long time_to_tick(unsigned long long time) 46 { 47 time *= MXC_CLK32; 48 do_div(time, CONFIG_SYS_HZ); 49 return time; 50 } 51 52 static inline unsigned long long us_to_tick(unsigned long long us) 53 { 54 us = us * MXC_CLK32 + 999999; 55 do_div(us, 1000000); 56 return us; 57 } 58 #else 59 /* ~2% error */ 60 #define TICK_PER_TIME ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) 61 #define US_PER_TICK (1000000 / MXC_CLK32) 62 63 static inline unsigned long long tick_to_time(unsigned long long tick) 64 { 65 do_div(tick, TICK_PER_TIME); 66 return tick; 67 } 68 69 static inline unsigned long long time_to_tick(unsigned long long time) 70 { 71 return time * TICK_PER_TIME; 72 } 73 74 static inline unsigned long long us_to_tick(unsigned long long us) 75 { 76 us += US_PER_TICK - 1; 77 do_div(us, US_PER_TICK); 78 return us; 79 } 80 #endif 81 82 /* The 32768Hz 32-bit timer overruns in 131072 seconds */ 83 int timer_init(void) 84 { 85 int i; 86 87 /* setup GP Timer 1 */ 88 GPTCR = GPTCR_SWR; 89 for (i = 0; i < 100; i++) 90 GPTCR = 0; /* We have no udelay by now */ 91 GPTPR = 0; /* 32Khz */ 92 /* Freerun Mode, PERCLK1 input */ 93 GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN; 94 95 return 0; 96 } 97 98 unsigned long long get_ticks(void) 99 { 100 ulong now = GPTCNT; /* current tick value */ 101 102 if (now >= gd->arch.lastinc) /* normal mode (non roll) */ 103 /* move stamp forward with absolut diff ticks */ 104 gd->arch.tbl += (now - gd->arch.lastinc); 105 else /* we have rollover of incrementer */ 106 gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now; 107 gd->arch.lastinc = now; 108 return gd->arch.tbl; 109 } 110 111 ulong get_timer_masked(void) 112 { 113 /* 114 * get_ticks() returns a long long (64 bit), it wraps in 115 * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ 116 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in 117 * 5 * 10^6 days - long enough. 118 */ 119 return tick_to_time(get_ticks()); 120 } 121 122 ulong get_timer(ulong base) 123 { 124 return get_timer_masked() - base; 125 } 126 127 /* delay x useconds AND preserve advance timestamp value */ 128 void __udelay(unsigned long usec) 129 { 130 unsigned long long tmp; 131 ulong tmo; 132 133 tmo = us_to_tick(usec); 134 tmp = get_ticks() + tmo; /* get current timestamp */ 135 136 while (get_ticks() < tmp) /* loop till event */ 137 /*NOP*/; 138 } 139 140 /* 141 * This function is derived from PowerPC code (timebase clock frequency). 142 * On ARM it returns the number of timer ticks per second. 143 */ 144 ulong get_tbclk(void) 145 { 146 return MXC_CLK32; 147 } 148