xref: /openbmc/u-boot/arch/arm/Kconfig (revision c6cca10b)
1menu "ARM architecture"
2	depends on ARM
3
4config SYS_ARCH
5	default "arm"
6
7config ARM64
8	bool
9	select PHYS_64BIT
10	select SYS_CACHE_SHIFT_6
11
12if ARM64
13config POSITION_INDEPENDENT
14	bool "Generate position-independent pre-relocation code"
15	help
16	  U-Boot expects to be linked to a specific hard-coded address, and to
17	  be loaded to and run from that address. This option lifts that
18	  restriction, thus allowing the code to be loaded to and executed
19	  from almost any address. This logic relies on the relocation
20	  information that is embedded into the binary to support U-Boot
21	  relocating itself to the top-of-RAM later during execution.
22
23config SYS_INIT_SP_BSS_OFFSET
24	int
25	help
26	  U-Boot typically uses a hard-coded value for the stack pointer
27	  before relocation. Define this option to instead calculate the
28	  initial SP at run-time. This is useful to avoid hard-coding addresses
29	  into U-Boot, so that can be loaded and executed at arbitrary
30	  addresses and thus avoid using arbitrary addresses at runtime. This
31	  option's value is the offset added to &_bss_start in order to
32	  calculate the stack pointer. This offset should be large enough so
33	  that the early malloc region, global data (gd), and early stack usage
34	  do not overlap any appended DTB.
35
36config LINUX_KERNEL_IMAGE_HEADER
37	bool
38	help
39	  Place a Linux kernel image header at the start of the U-Boot binary.
40	  The format of the header is described in the Linux kernel source at
41	  Documentation/arm64/booting.txt. This feature is useful since the
42	  image header reports the amount of memory (BSS and similar) that
43	  U-Boot needs to use, but which isn't part of the binary.
44
45if LINUX_KERNEL_IMAGE_HEADER
46config LNX_KRNL_IMG_TEXT_OFFSET_BASE
47	hex
48	help
49	  The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
50	  TEXT_OFFSET value written in to the Linux kernel image header.
51endif
52endif
53
54config STATIC_RELA
55	bool
56	default y if ARM64 && !POSITION_INDEPENDENT
57
58config DMA_ADDR_T_64BIT
59	bool
60	default y if ARM64
61
62config HAS_VBAR
63	bool
64
65config HAS_THUMB2
66	bool
67
68# Used for compatibility with asm files copied from the kernel
69config ARM_ASM_UNIFIED
70	bool
71	default y
72
73# Used for compatibility with asm files copied from the kernel
74config THUMB2_KERNEL
75	bool
76
77config SYS_ARM_CACHE_CP15
78	bool "CP15 based cache enabling support"
79	help
80	  Select this if your processor suports enabling caches by using
81	  CP15 registers.
82
83config SYS_ARM_MMU
84	bool "MMU-based Paged Memory Management Support"
85	select SYS_ARM_CACHE_CP15
86	help
87	  Select if you want MMU-based virtualised addressing space
88	  support by paged memory management.
89
90config SYS_ARM_MPU
91	bool 'Use the ARM v7 PMSA Compliant MPU'
92	help
93	  Some ARM systems without an MMU have instead a Memory Protection
94	  Unit (MPU) that defines the type and permissions for regions of
95	  memory.
96	  If your CPU has an MPU then you should choose 'y' here unless you
97	  know that you do not want to use the MPU.
98
99# If set, the workarounds for these ARM errata are applied early during U-Boot
100# startup. Note that in general these options force the workarounds to be
101# applied; no CPU-type/version detection exists, unlike the similar options in
102# the Linux kernel. Do not set these options unless they apply!  Also note that
103# the following can be machine specific errata. These do have ability to
104# provide rudimentary version and machine specific checks, but expect no
105# product checks:
106# CONFIG_ARM_ERRATA_430973
107# CONFIG_ARM_ERRATA_454179
108# CONFIG_ARM_ERRATA_621766
109# CONFIG_ARM_ERRATA_798870
110# CONFIG_ARM_ERRATA_801819
111# CONFIG_ARM_CORTEX_A8_CVE_2017_5715
112# CONFIG_ARM_CORTEX_A15_CVE_2017_5715
113
114config ARM_ERRATA_430973
115	bool
116
117config ARM_ERRATA_454179
118	bool
119
120config ARM_ERRATA_621766
121	bool
122
123config ARM_ERRATA_716044
124	bool
125
126config ARM_ERRATA_725233
127	bool
128
129config ARM_ERRATA_742230
130	bool
131
132config ARM_ERRATA_743622
133	bool
134
135config ARM_ERRATA_751472
136	bool
137
138config ARM_ERRATA_761320
139	bool
140
141config ARM_ERRATA_773022
142	bool
143
144config ARM_ERRATA_774769
145	bool
146
147config ARM_ERRATA_794072
148	bool
149
150config ARM_ERRATA_798870
151	bool
152
153config ARM_ERRATA_801819
154	bool
155
156config ARM_ERRATA_826974
157	bool
158
159config ARM_ERRATA_828024
160	bool
161
162config ARM_ERRATA_829520
163	bool
164
165config ARM_ERRATA_833069
166	bool
167
168config ARM_ERRATA_833471
169	bool
170
171config ARM_ERRATA_845369
172	bool
173
174config ARM_ERRATA_852421
175	bool
176
177config ARM_ERRATA_852423
178	bool
179
180config ARM_ERRATA_855873
181	bool
182
183config ARM_CORTEX_A8_CVE_2017_5715
184	bool
185
186config ARM_CORTEX_A15_CVE_2017_5715
187	bool
188
189config CPU_ARM720T
190	bool
191	select SYS_CACHE_SHIFT_5
192	imply SYS_ARM_MMU
193
194config CPU_ARM920T
195	bool
196	select SYS_CACHE_SHIFT_5
197	imply SYS_ARM_MMU
198
199config CPU_ARM926EJS
200	bool
201	select SYS_CACHE_SHIFT_5
202	imply SYS_ARM_MMU
203
204config CPU_ARM946ES
205	bool
206	select SYS_CACHE_SHIFT_5
207	imply SYS_ARM_MMU
208
209config CPU_ARM1136
210	bool
211	select SYS_CACHE_SHIFT_5
212	imply SYS_ARM_MMU
213
214config CPU_ARM1176
215	bool
216	select HAS_VBAR
217	select SYS_CACHE_SHIFT_5
218	imply SYS_ARM_MMU
219
220config CPU_V7A
221	bool
222	select HAS_THUMB2
223	select HAS_VBAR
224	select SYS_CACHE_SHIFT_6
225	imply SYS_ARM_MMU
226
227config CPU_V7M
228	bool
229	select HAS_THUMB2
230	select SYS_ARM_MPU
231	select SYS_CACHE_SHIFT_5
232	select SYS_THUMB_BUILD
233	select THUMB2_KERNEL
234
235config CPU_V7R
236	bool
237	select HAS_THUMB2
238	select SYS_ARM_CACHE_CP15
239	select SYS_ARM_MPU
240	select SYS_CACHE_SHIFT_6
241
242config CPU_PXA
243	bool
244	select SYS_CACHE_SHIFT_5
245	imply SYS_ARM_MMU
246
247config CPU_SA1100
248	bool
249	select SYS_CACHE_SHIFT_5
250	imply SYS_ARM_MMU
251
252config SYS_CPU
253	default "arm720t" if CPU_ARM720T
254	default "arm920t" if CPU_ARM920T
255	default "arm926ejs" if CPU_ARM926EJS
256	default "arm946es" if CPU_ARM946ES
257	default "arm1136" if CPU_ARM1136
258	default "arm1176" if CPU_ARM1176
259	default "armv7" if CPU_V7A
260	default "armv7" if CPU_V7R
261	default "armv7m" if CPU_V7M
262	default "pxa" if CPU_PXA
263	default "sa1100" if CPU_SA1100
264	default "armv8" if ARM64
265
266config SYS_ARM_ARCH
267	int
268	default 4 if CPU_ARM720T
269	default 4 if CPU_ARM920T
270	default 5 if CPU_ARM926EJS
271	default 5 if CPU_ARM946ES
272	default 6 if CPU_ARM1136
273	default 6 if CPU_ARM1176
274	default 7 if CPU_V7A
275	default 7 if CPU_V7M
276	default 7 if CPU_V7R
277	default 5 if CPU_PXA
278	default 4 if CPU_SA1100
279	default 8 if ARM64
280
281config SYS_CACHE_SHIFT_5
282	bool
283
284config SYS_CACHE_SHIFT_6
285	bool
286
287config SYS_CACHE_SHIFT_7
288	bool
289
290config SYS_CACHELINE_SIZE
291	int
292	default 128 if SYS_CACHE_SHIFT_7
293	default 64 if SYS_CACHE_SHIFT_6
294	default 32 if SYS_CACHE_SHIFT_5
295
296config SYS_ARCH_TIMER
297	bool "ARM Generic Timer support"
298	depends on CPU_V7A || ARM64
299	default y if ARM64
300	help
301	  The ARM Generic Timer (aka arch-timer) provides an architected
302	  interface to a timer source on an SoC.
303	  It is mandantory for ARMv8 implementation and widely available
304	  on ARMv7 systems.
305
306config ARM_SMCCC
307	bool "Support for ARM SMC Calling Convention (SMCCC)"
308	depends on CPU_V7A || ARM64
309	select ARM_PSCI_FW
310	help
311	  Say Y here if you want to enable ARM SMC Calling Convention.
312	  This should be enabled if U-Boot needs to communicate with system
313	  firmware (for example, PSCI) according to SMCCC.
314
315config SEMIHOSTING
316	bool "support boot from semihosting"
317	help
318	  In emulated environments, semihosting is a way for
319	  the hosted environment to call out to the emulator to
320	  retrieve files from the host machine.
321
322config SYS_THUMB_BUILD
323	bool "Build U-Boot using the Thumb instruction set"
324	depends on !ARM64
325	help
326	   Use this flag to build U-Boot using the Thumb instruction set for
327	   ARM architectures. Thumb instruction set provides better code
328	   density. For ARM architectures that support Thumb2 this flag will
329	   result in Thumb2 code generated by GCC.
330
331config SPL_SYS_THUMB_BUILD
332	bool "Build SPL using the Thumb instruction set"
333	default y if SYS_THUMB_BUILD
334	depends on !ARM64
335	help
336	   Use this flag to build SPL using the Thumb instruction set for
337	   ARM architectures. Thumb instruction set provides better code
338	   density. For ARM architectures that support Thumb2 this flag will
339	   result in Thumb2 code generated by GCC.
340
341config SYS_L2CACHE_OFF
342	bool "L2cache off"
343	help
344	  If SoC does not support L2CACHE or one do not want to enable
345	  L2CACHE, choose this option.
346
347config ENABLE_ARM_SOC_BOOT0_HOOK
348	bool "prepare BOOT0 header"
349	help
350	  If the SoC's BOOT0 requires a header area filled with (magic)
351	  values, then choose this option, and create a file included as
352	  <asm/arch/boot0.h> which contains the required assembler code.
353
354config ARM_CORTEX_CPU_IS_UP
355	bool
356	default n
357
358config USE_ARCH_MEMCPY
359	bool "Use an assembly optimized implementation of memcpy"
360	default y
361	depends on !ARM64
362	help
363	  Enable the generation of an optimized version of memcpy.
364	  Such implementation may be faster under some conditions
365	  but may increase the binary size.
366
367config SPL_USE_ARCH_MEMCPY
368	bool "Use an assembly optimized implementation of memcpy for SPL"
369	default y if USE_ARCH_MEMCPY
370	depends on !ARM64
371	help
372	  Enable the generation of an optimized version of memcpy.
373	  Such implementation may be faster under some conditions
374	  but may increase the binary size.
375
376config USE_ARCH_MEMSET
377	bool "Use an assembly optimized implementation of memset"
378	default y
379	depends on !ARM64
380	help
381	  Enable the generation of an optimized version of memset.
382	  Such implementation may be faster under some conditions
383	  but may increase the binary size.
384
385config SPL_USE_ARCH_MEMSET
386	bool "Use an assembly optimized implementation of memset for SPL"
387	default y if USE_ARCH_MEMSET
388	depends on !ARM64
389	help
390	  Enable the generation of an optimized version of memset.
391	  Such implementation may be faster under some conditions
392	  but may increase the binary size.
393
394config ARM64_SUPPORT_AARCH32
395	bool "ARM64 system support AArch32 execution state"
396	default y if ARM64 && !TARGET_THUNDERX_88XX
397	help
398	  This ARM64 system supports AArch32 execution state.
399
400choice
401	prompt "Target select"
402	default TARGET_HIKEY
403
404config ARCH_AT91
405	bool "Atmel AT91"
406	select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
407
408config TARGET_EDB93XX
409	bool "Support edb93xx"
410	select CPU_ARM920T
411	select PL010_SERIAL
412
413config TARGET_ASPENITE
414	bool "Support aspenite"
415	select CPU_ARM926EJS
416
417config TARGET_GPLUGD
418	bool "Support gplugd"
419	select CPU_ARM926EJS
420
421config ARCH_DAVINCI
422	bool "TI DaVinci"
423	select CPU_ARM926EJS
424	imply CMD_SAVES
425	help
426	  Support for TI's DaVinci platform.
427
428config KIRKWOOD
429	bool "Marvell Kirkwood"
430	select ARCH_MISC_INIT
431	select BOARD_EARLY_INIT_F
432	select CPU_ARM926EJS
433
434config ARCH_MVEBU
435	bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
436	select DM
437	select DM_ETH
438	select DM_SERIAL
439	select DM_SPI
440	select DM_SPI_FLASH
441	select OF_CONTROL
442	select OF_SEPARATE
443	select SPI
444	imply CMD_DM
445
446config TARGET_DEVKIT3250
447	bool "Support devkit3250"
448	select CPU_ARM926EJS
449	select SUPPORT_SPL
450
451config TARGET_WORK_92105
452	bool "Support work_92105"
453	select CPU_ARM926EJS
454	select SUPPORT_SPL
455
456config TARGET_APF27
457	bool "Support apf27"
458	select CPU_ARM926EJS
459	select SUPPORT_SPL
460
461config ORION5X
462	bool "Marvell Orion"
463	select CPU_ARM926EJS
464
465config TARGET_SPEAR300
466	bool "Support spear300"
467	select BOARD_EARLY_INIT_F
468	select CPU_ARM926EJS
469	select PL011_SERIAL
470	imply CMD_SAVES
471
472config TARGET_SPEAR310
473	bool "Support spear310"
474	select BOARD_EARLY_INIT_F
475	select CPU_ARM926EJS
476	select PL011_SERIAL
477	imply CMD_SAVES
478
479config TARGET_SPEAR320
480	bool "Support spear320"
481	select BOARD_EARLY_INIT_F
482	select CPU_ARM926EJS
483	select PL011_SERIAL
484	imply CMD_SAVES
485
486config TARGET_SPEAR600
487	bool "Support spear600"
488	select BOARD_EARLY_INIT_F
489	select CPU_ARM926EJS
490	select PL011_SERIAL
491	imply CMD_SAVES
492
493config TARGET_STV0991
494	bool "Support stv0991"
495	select CPU_V7A
496	select DM
497	select DM_SERIAL
498	select DM_SPI
499	select DM_SPI_FLASH
500	select PL01X_SERIAL
501	select SPI
502	select SPI_FLASH
503	imply CMD_DM
504
505config TARGET_X600
506	bool "Support x600"
507	select BOARD_LATE_INIT
508	select CPU_ARM926EJS
509	select PL011_SERIAL
510	select SUPPORT_SPL
511
512config TARGET_WOODBURN
513	bool "Support woodburn"
514	select CPU_ARM1136
515
516config TARGET_WOODBURN_SD
517	bool "Support woodburn_sd"
518	select CPU_ARM1136
519	select SUPPORT_SPL
520
521config TARGET_FLEA3
522	bool "Support flea3"
523	select CPU_ARM1136
524
525config TARGET_MX35PDK
526	bool "Support mx35pdk"
527	select BOARD_LATE_INIT
528	select CPU_ARM1136
529
530config ARCH_BCM283X
531	bool "Broadcom BCM283X family"
532	select DM
533	select DM_GPIO
534	select DM_SERIAL
535	select OF_CONTROL
536	select PL01X_SERIAL
537	select SERIAL_SEARCH_ALL
538	imply CMD_DM
539	imply FAT_WRITE
540
541config TARGET_VEXPRESS_CA15_TC2
542	bool "Support vexpress_ca15_tc2"
543	select CPU_V7A
544	select CPU_V7_HAS_NONSEC
545	select CPU_V7_HAS_VIRT
546	select PL011_SERIAL
547
548config ARCH_BCMSTB
549	bool "Broadcom BCM7XXX family"
550	select CPU_V7A
551	select DM
552	select OF_CONTROL
553	select OF_PRIOR_STAGE
554	imply CMD_DM
555	help
556	  This enables support for Broadcom ARM-based set-top box
557	  chipsets, including the 7445 family of chips.
558
559config TARGET_VEXPRESS_CA5X2
560	bool "Support vexpress_ca5x2"
561	select CPU_V7A
562	select PL011_SERIAL
563
564config TARGET_VEXPRESS_CA9X4
565	bool "Support vexpress_ca9x4"
566	select CPU_V7A
567	select PL011_SERIAL
568
569config TARGET_BCM23550_W1D
570	bool "Support bcm23550_w1d"
571	select CPU_V7A
572	imply CRC32_VERIFY
573	imply FAT_WRITE
574
575config TARGET_BCM28155_AP
576	bool "Support bcm28155_ap"
577	select CPU_V7A
578	imply CRC32_VERIFY
579	imply FAT_WRITE
580
581config TARGET_BCMCYGNUS
582	bool "Support bcmcygnus"
583	select CPU_V7A
584	imply BCM_SF2_ETH
585	imply BCM_SF2_ETH_GMAC
586	imply CMD_HASH
587	imply CRC32_VERIFY
588	imply FAT_WRITE
589	imply HASH_VERIFY
590	imply NETDEVICES
591
592config TARGET_BCMNSP
593	bool "Support bcmnsp"
594	select CPU_V7A
595
596config TARGET_BCMNS2
597	bool "Support Broadcom Northstar2"
598	select ARM64
599	help
600	  Support for Broadcom Northstar 2 SoCs.  NS2 is a quad-core 64-bit
601	  ARMv8 Cortex-A57 processors targeting a broad range of networking
602	  applications
603
604config ARCH_EXYNOS
605	bool "Samsung EXYNOS"
606	select DM
607	select DM_GPIO
608	select DM_I2C
609	select DM_KEYBOARD
610	select DM_SERIAL
611	select DM_SPI
612	select DM_SPI_FLASH
613	select SPI
614	imply CMD_DM
615	imply FAT_WRITE
616
617config ARCH_S5PC1XX
618	bool "Samsung S5PC1XX"
619	select CPU_V7A
620	select DM
621	select DM_GPIO
622	select DM_I2C
623	select DM_SERIAL
624	imply CMD_DM
625
626config ARCH_HIGHBANK
627	bool "Calxeda Highbank"
628	select CPU_V7A
629	select PL011_SERIAL
630
631config ARCH_INTEGRATOR
632	bool "ARM Ltd. Integrator family"
633	select DM
634	select DM_SERIAL
635	select PL01X_SERIAL
636	imply CMD_DM
637
638config ARCH_KEYSTONE
639	bool "TI Keystone"
640	select CMD_POWEROFF
641	select CPU_V7A
642	select SUPPORT_SPL
643	select SYS_ARCH_TIMER
644	select SYS_THUMB_BUILD
645	imply CMD_MTDPARTS
646	imply CMD_SAVES
647	imply FIT
648
649config ARCH_OMAP2PLUS
650	bool "TI OMAP2+"
651	select CPU_V7A
652	select SPL_BOARD_INIT if SPL
653	select SPL_STACK_R if SPL
654	select SUPPORT_SPL
655	imply FIT
656
657config ARCH_MESON
658	bool "Amlogic Meson"
659	imply DISTRO_DEFAULTS
660	help
661	  Support for the Meson SoC family developed by Amlogic Inc.,
662	  targeted at media players and tablet computers. We currently
663	  support the S905 (GXBaby) 64-bit SoC.
664
665config ARCH_MX8M
666	bool "NXP i.MX8M platform"
667	select ARM64
668	select DM
669	select SUPPORT_SPL
670	imply CMD_DM
671
672config ARCH_MX23
673	bool "NXP i.MX23 family"
674	select CPU_ARM926EJS
675	select PL011_SERIAL
676	select SUPPORT_SPL
677
678config ARCH_MX25
679	bool "NXP MX25"
680	select CPU_ARM926EJS
681	imply MXC_GPIO
682
683config ARCH_MX28
684	bool "NXP i.MX28 family"
685	select CPU_ARM926EJS
686	select PL011_SERIAL
687	select SUPPORT_SPL
688
689config ARCH_MX31
690	bool "NXP i.MX31 family"
691	select CPU_ARM1136
692
693config ARCH_MX7ULP
694	bool "NXP MX7ULP"
695	select CPU_V7A
696	select ROM_UNIFIED_SECTIONS
697	imply MXC_GPIO
698
699config ARCH_MX7
700	bool "Freescale MX7"
701	select ARCH_MISC_INIT
702	select BOARD_EARLY_INIT_F
703	select CPU_V7A
704	select SYS_FSL_HAS_SEC if SECURE_BOOT
705	select SYS_FSL_SEC_COMPAT_4
706	select SYS_FSL_SEC_LE
707	imply MXC_GPIO
708
709config ARCH_MX6
710	bool "Freescale MX6"
711	select CPU_V7A
712	select SYS_FSL_HAS_SEC if SECURE_BOOT
713	select SYS_FSL_SEC_COMPAT_4
714	select SYS_FSL_SEC_LE
715	select SYS_THUMB_BUILD if SPL
716	imply MXC_GPIO
717
718if ARCH_MX6
719config SPL_LDSCRIPT
720	default "arch/arm/mach-omap2/u-boot-spl.lds"
721endif
722
723config ARCH_MX5
724	bool "Freescale MX5"
725	select BOARD_EARLY_INIT_F
726	select CPU_V7A
727	imply MXC_GPIO
728
729config ARCH_OWL
730	bool "Actions Semi OWL SoCs"
731	select ARM64
732	select DM
733	select DM_SERIAL
734	select OF_CONTROL
735	imply CMD_DM
736
737config ARCH_QEMU
738	bool "QEMU Virtual Platform"
739	select DM
740	select DM_SERIAL
741	select OF_CONTROL
742	select PL01X_SERIAL
743	imply CMD_DM
744
745config ARCH_RMOBILE
746	bool "Renesas ARM SoCs"
747	select BOARD_EARLY_INIT_F
748	select DM
749	select DM_SERIAL
750	imply CMD_DM
751	imply FAT_WRITE
752	imply SYS_THUMB_BUILD
753
754config TARGET_S32V234EVB
755	bool "Support s32v234evb"
756	select ARM64
757	select SYS_FSL_ERRATUM_ESDHC111
758
759config ARCH_SNAPDRAGON
760	bool "Qualcomm Snapdragon SoCs"
761	select ARM64
762	select DM
763	select DM_GPIO
764	select DM_SERIAL
765	select MSM_SMEM
766	select OF_CONTROL
767	select OF_SEPARATE
768	select SMEM
769	select SPMI
770	imply CMD_DM
771
772config ARCH_SOCFPGA
773	bool "Altera SOCFPGA family"
774	select ARCH_EARLY_INIT_R
775	select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
776	select ARM64 if TARGET_SOCFPGA_STRATIX10
777	select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
778	select DM
779	select DM_SERIAL
780	select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
781	select OF_CONTROL
782	select SPL_DM_RESET if DM_RESET
783	select SPL_DM_SERIAL
784	select SPL_LIBCOMMON_SUPPORT
785	select SPL_LIBDISK_SUPPORT
786	select SPL_LIBGENERIC_SUPPORT
787	select SPL_MMC_SUPPORT if DM_MMC
788	select SPL_NAND_SUPPORT if SPL_NAND_DENALI
789	select SPL_OF_CONTROL
790	select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
791	select SPL_SERIAL_SUPPORT
792	select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
793	select SPL_SPI_SUPPORT if DM_SPI
794	select SPL_WATCHDOG_SUPPORT
795	select SUPPORT_SPL
796	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
797	select SYS_NS16550
798	select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
799	imply CMD_DM
800	imply CMD_MTDPARTS
801	imply CRC32_VERIFY
802	imply DM_SPI
803	imply DM_SPI_FLASH
804	imply FAT_WRITE
805	imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
806
807config ARCH_SUNXI
808	bool "Support sunxi (Allwinner) SoCs"
809	select BINMAN
810	select CMD_GPIO
811	select CMD_MMC if MMC
812	select CMD_USB if DISTRO_DEFAULTS
813	select DM
814	select DM_ETH
815	select DM_GPIO
816	select DM_KEYBOARD
817	select DM_SERIAL
818	select DM_USB if DISTRO_DEFAULTS
819	select OF_BOARD_SETUP
820	select OF_CONTROL
821	select OF_SEPARATE
822	select SPECIFY_CONSOLE_INDEX
823	select SPL_STACK_R if SPL
824	select SPL_SYS_MALLOC_SIMPLE if SPL
825	select SPL_SYS_THUMB_BUILD if !ARM64
826	select SYS_NS16550
827	select SYS_THUMB_BUILD if !ARM64
828	select USB if DISTRO_DEFAULTS
829	select USB_KEYBOARD if DISTRO_DEFAULTS
830	select USB_STORAGE if DISTRO_DEFAULTS
831	select USE_TINY_PRINTF
832	imply CMD_DM
833	imply CMD_GPT
834	imply CMD_UBI if NAND
835	imply DISTRO_DEFAULTS
836	imply FAT_WRITE
837	imply OF_LIBFDT_OVERLAY
838	imply PRE_CONSOLE_BUFFER
839	imply SPL_GPIO_SUPPORT
840	imply SPL_LIBCOMMON_SUPPORT
841	imply SPL_LIBDISK_SUPPORT
842	imply SPL_LIBGENERIC_SUPPORT
843	imply SPL_MMC_SUPPORT if MMC
844	imply SPL_POWER_SUPPORT
845	imply SPL_SERIAL_SUPPORT
846	imply USB_GADGET
847
848config ARCH_VF610
849	bool "Freescale Vybrid"
850	select CPU_V7A
851	select SYS_FSL_ERRATUM_ESDHC111
852	imply CMD_MTDPARTS
853	imply NAND
854
855config ARCH_ZYNQ
856	bool "Xilinx Zynq based platform"
857	select BOARD_EARLY_INIT_F if WDT
858	select BOARD_LATE_INIT
859	select CLK
860	select CLK_ZYNQ
861	select CPU_V7A
862	select DM
863	select DM_ETH if NET
864	select DM_MMC if MMC
865	select DM_SERIAL
866	select DM_SPI
867	select DM_SPI_FLASH
868	select DM_USB if USB
869	select OF_CONTROL
870	select SPI
871	select SPL_BOARD_INIT if SPL
872	select SPL_CLK if SPL
873	select SPL_DM if SPL
874	select SPL_OF_CONTROL if SPL
875	select SPL_SEPARATE_BSS if SPL
876	select SUPPORT_SPL
877	imply ARCH_EARLY_INIT_R
878	imply CMD_CLK
879	imply CMD_DM
880	imply CMD_SPL
881	imply FAT_WRITE
882
883config ARCH_ZYNQMP_R5
884	bool "Xilinx ZynqMP R5 based platform"
885	select CLK
886	select CPU_V7R
887	select DM
888	select DM_SERIAL
889	select OF_CONTROL
890	imply CMD_DM
891
892config ARCH_ZYNQMP
893	bool "Xilinx ZynqMP based platform"
894	select ARM64
895	select BOARD_LATE_INIT
896	select CLK
897	select DM
898	select DM_SERIAL
899	select DM_USB if USB
900	select OF_CONTROL
901	select SPL_BOARD_INIT if SPL
902	select SPL_CLK if SPL
903	select SUPPORT_SPL
904	imply CMD_DM
905	imply FAT_WRITE
906
907config TEGRA
908	bool "NVIDIA Tegra"
909	imply DISTRO_DEFAULTS
910	imply FAT_WRITE
911
912config TARGET_VEXPRESS64_AEMV8A
913	bool "Support vexpress_aemv8a"
914	select ARM64
915	select PL01X_SERIAL
916
917config TARGET_VEXPRESS64_BASE_FVP
918	bool "Support Versatile Express ARMv8a FVP BASE model"
919	select ARM64
920	select PL01X_SERIAL
921	select SEMIHOSTING
922
923config TARGET_VEXPRESS64_BASE_FVP_DRAM
924	bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
925	select ARM64
926	select PL01X_SERIAL
927	help
928	  This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
929	  the default config to allow the user to load the images directly into
930	  DRAM using model parameters rather than by using semi-hosting to load
931	  the files from the host filesystem.
932
933config TARGET_VEXPRESS64_JUNO
934	bool "Support Versatile Express Juno Development Platform"
935	select ARM64
936	select PL01X_SERIAL
937
938config TARGET_LS2080A_EMU
939	bool "Support ls2080a_emu"
940	select ARCH_LS2080A
941	select ARCH_MISC_INIT
942	select ARM64
943	select ARMV8_MULTIENTRY
944	help
945	  Support for Freescale LS2080A_EMU platform
946	  The LS2080A Development System (EMULATOR) is a pre silicon
947	  development platform that supports the QorIQ LS2080A
948	  Layerscape Architecture processor.
949
950config TARGET_LS2080A_SIMU
951	bool "Support ls2080a_simu"
952	select ARCH_LS2080A
953	select ARCH_MISC_INIT
954	select ARM64
955	select ARMV8_MULTIENTRY
956	help
957	  Support for Freescale LS2080A_SIMU platform
958	  The LS2080A Development System (QDS) is a pre silicon
959	  development platform that supports the QorIQ LS2080A
960	  Layerscape Architecture processor.
961
962config TARGET_LS1088AQDS
963	bool "Support ls1088aqds"
964	select ARCH_LS1088A
965	select ARCH_MISC_INIT
966	select ARM64
967	select ARMV8_MULTIENTRY
968	select BOARD_LATE_INIT
969	select SUPPORT_SPL
970	help
971	  Support for NXP LS1088AQDS platform
972	  The LS1088A Development System (QDS) is a high-performance
973	  development platform that supports the QorIQ LS1088A
974	  Layerscape Architecture processor.
975
976config TARGET_LS2080AQDS
977	bool "Support ls2080aqds"
978	select ARCH_LS2080A
979	select ARCH_MISC_INIT
980	select ARM64
981	select ARMV8_MULTIENTRY
982	select BOARD_LATE_INIT
983	select SUPPORT_SPL
984	imply SCSI
985	imply SCSI_AHCI
986	help
987	  Support for Freescale LS2080AQDS platform
988	  The LS2080A Development System (QDS) is a high-performance
989	  development platform that supports the QorIQ LS2080A
990	  Layerscape Architecture processor.
991
992config TARGET_LS2080ARDB
993	bool "Support ls2080ardb"
994	select ARCH_LS2080A
995	select ARCH_MISC_INIT
996	select ARM64
997	select ARMV8_MULTIENTRY
998	select BOARD_LATE_INIT
999	select SUPPORT_SPL
1000	imply SCSI
1001	imply SCSI_AHCI
1002	help
1003	  Support for Freescale LS2080ARDB platform.
1004	  The LS2080A Reference design board (RDB) is a high-performance
1005	  development platform that supports the QorIQ LS2080A
1006	  Layerscape Architecture processor.
1007
1008config TARGET_LS2081ARDB
1009	bool "Support ls2081ardb"
1010	select ARCH_LS2080A
1011	select ARCH_MISC_INIT
1012	select ARM64
1013	select ARMV8_MULTIENTRY
1014	select BOARD_LATE_INIT
1015	select SUPPORT_SPL
1016	help
1017	  Support for Freescale LS2081ARDB platform.
1018	  The LS2081A Reference design board (RDB) is a high-performance
1019	  development platform that supports the QorIQ LS2081A/LS2041A
1020	  Layerscape Architecture processor.
1021
1022config TARGET_HIKEY
1023	bool "Support HiKey 96boards Consumer Edition Platform"
1024	select ARM64
1025	select DM
1026	select DM_GPIO
1027	select DM_SERIAL
1028	select OF_CONTROL
1029	select PL01X_SERIAL
1030	select SPECIFY_CONSOLE_INDEX
1031	imply CMD_DM
1032	  help
1033	  Support for HiKey 96boards platform. It features a HI6220
1034	  SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1035
1036config TARGET_POPLAR
1037	bool "Support Poplar 96boards Enterprise Edition Platform"
1038	select ARM64
1039	select DM
1040	select DM_SERIAL
1041	select DM_USB
1042	select OF_CONTROL
1043	select PL01X_SERIAL
1044	imply CMD_DM
1045	  help
1046	  Support for Poplar 96boards EE platform. It features a HI3798cv200
1047	  SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1048	  making it capable of running any commercial set-top solution based on
1049	  Linux or Android.
1050
1051config TARGET_LS1012AQDS
1052	bool "Support ls1012aqds"
1053	select ARCH_LS1012A
1054	select ARM64
1055	select BOARD_LATE_INIT
1056	help
1057	  Support for Freescale LS1012AQDS platform.
1058	  The LS1012A Development System (QDS) is a high-performance
1059	  development platform that supports the QorIQ LS1012A
1060	  Layerscape Architecture processor.
1061
1062config TARGET_LS1012ARDB
1063	bool "Support ls1012ardb"
1064	select ARCH_LS1012A
1065	select ARM64
1066	select BOARD_LATE_INIT
1067	imply SCSI
1068	imply SCSI_AHCI
1069	help
1070	  Support for Freescale LS1012ARDB platform.
1071	  The LS1012A Reference design board (RDB) is a high-performance
1072	  development platform that supports the QorIQ LS1012A
1073	  Layerscape Architecture processor.
1074
1075config TARGET_LS1012A2G5RDB
1076	bool "Support ls1012a2g5rdb"
1077	select ARCH_LS1012A
1078	select ARM64
1079	select BOARD_LATE_INIT
1080	imply SCSI
1081	help
1082	  Support for Freescale LS1012A2G5RDB platform.
1083	  The LS1012A 2G5 Reference design board (RDB) is a high-performance
1084	  development platform that supports the QorIQ LS1012A
1085	  Layerscape Architecture processor.
1086
1087config TARGET_LS1012AFRWY
1088	bool "Support ls1012afrwy"
1089	select ARCH_LS1012A
1090	select ARM64
1091	select BOARD_LATE_INIT
1092	imply SCSI
1093	imply SCSI_AHCI
1094	help
1095	 Support for Freescale LS1012AFRWY platform.
1096	 The LS1012A FRWY board (FRWY) is a high-performance
1097	 development platform that supports the QorIQ LS1012A
1098	 Layerscape Architecture processor.
1099
1100config TARGET_LS1012AFRDM
1101	bool "Support ls1012afrdm"
1102	select ARCH_LS1012A
1103	select ARM64
1104	help
1105	  Support for Freescale LS1012AFRDM platform.
1106	  The LS1012A Freedom  board (FRDM) is a high-performance
1107	  development platform that supports the QorIQ LS1012A
1108	  Layerscape Architecture processor.
1109
1110config TARGET_LS1088ARDB
1111	bool "Support ls1088ardb"
1112	select ARCH_LS1088A
1113	select ARCH_MISC_INIT
1114	select ARM64
1115	select ARMV8_MULTIENTRY
1116	select BOARD_LATE_INIT
1117	select SUPPORT_SPL
1118	help
1119	  Support for NXP LS1088ARDB platform.
1120	  The LS1088A Reference design board (RDB) is a high-performance
1121	  development platform that supports the QorIQ LS1088A
1122	  Layerscape Architecture processor.
1123
1124config TARGET_LS1021AQDS
1125	bool "Support ls1021aqds"
1126	select ARCH_LS1021A
1127	select ARCH_SUPPORT_PSCI
1128	select BOARD_EARLY_INIT_F
1129	select BOARD_LATE_INIT
1130	select CPU_V7A
1131	select CPU_V7_HAS_NONSEC
1132	select CPU_V7_HAS_VIRT
1133	select LS1_DEEP_SLEEP
1134	select SUPPORT_SPL
1135	select SYS_FSL_DDR
1136	imply SCSI
1137
1138config TARGET_LS1021ATWR
1139	bool "Support ls1021atwr"
1140	select ARCH_LS1021A
1141	select ARCH_SUPPORT_PSCI
1142	select BOARD_EARLY_INIT_F
1143	select BOARD_LATE_INIT
1144	select CPU_V7A
1145	select CPU_V7_HAS_NONSEC
1146	select CPU_V7_HAS_VIRT
1147	select LS1_DEEP_SLEEP
1148	select SUPPORT_SPL
1149	imply SCSI
1150
1151config TARGET_LS1021AIOT
1152	bool "Support ls1021aiot"
1153	select ARCH_LS1021A
1154	select ARCH_SUPPORT_PSCI
1155	select BOARD_LATE_INIT
1156	select CPU_V7A
1157	select CPU_V7_HAS_NONSEC
1158	select CPU_V7_HAS_VIRT
1159	select SUPPORT_SPL
1160	imply SCSI
1161	help
1162	  Support for Freescale LS1021AIOT platform.
1163	  The LS1021A Freescale board (IOT) is a high-performance
1164	  development platform that supports the QorIQ LS1021A
1165	  Layerscape Architecture processor.
1166
1167config TARGET_LS1043AQDS
1168	bool "Support ls1043aqds"
1169	select ARCH_LS1043A
1170	select ARM64
1171	select ARMV8_MULTIENTRY
1172	select BOARD_EARLY_INIT_F
1173	select BOARD_LATE_INIT
1174	select SUPPORT_SPL
1175	imply SCSI
1176	help
1177	  Support for Freescale LS1043AQDS platform.
1178
1179config TARGET_LS1043ARDB
1180	bool "Support ls1043ardb"
1181	select ARCH_LS1043A
1182	select ARM64
1183	select ARMV8_MULTIENTRY
1184	select BOARD_EARLY_INIT_F
1185	select BOARD_LATE_INIT
1186	select SUPPORT_SPL
1187	imply SCSI
1188	help
1189	  Support for Freescale LS1043ARDB platform.
1190
1191config TARGET_LS1046AQDS
1192	bool "Support ls1046aqds"
1193	select ARCH_LS1046A
1194	select ARM64
1195	select ARMV8_MULTIENTRY
1196	select BOARD_EARLY_INIT_F
1197	select BOARD_LATE_INIT
1198	select DM_SPI_FLASH if DM_SPI
1199	select SUPPORT_SPL
1200	imply SCSI
1201	help
1202	  Support for Freescale LS1046AQDS platform.
1203	  The LS1046A Development System (QDS) is a high-performance
1204	  development platform that supports the QorIQ LS1046A
1205	  Layerscape Architecture processor.
1206
1207config TARGET_LS1046ARDB
1208	bool "Support ls1046ardb"
1209	select ARCH_LS1046A
1210	select ARM64
1211	select ARMV8_MULTIENTRY
1212	select BOARD_EARLY_INIT_F
1213	select BOARD_LATE_INIT
1214	select DM_SPI_FLASH if DM_SPI
1215	select POWER_MC34VR500
1216	select SUPPORT_SPL
1217	imply SCSI
1218	help
1219	  Support for Freescale LS1046ARDB platform.
1220	  The LS1046A Reference Design Board (RDB) is a high-performance
1221	  development platform that supports the QorIQ LS1046A
1222	  Layerscape Architecture processor.
1223
1224config TARGET_H2200
1225	bool "Support h2200"
1226	select CPU_PXA
1227
1228config TARGET_ZIPITZ2
1229	bool "Support zipitz2"
1230	select CPU_PXA
1231
1232config TARGET_COLIBRI_PXA270
1233	bool "Support colibri_pxa270"
1234	select CPU_PXA
1235
1236config ARCH_UNIPHIER
1237	bool "Socionext UniPhier SoCs"
1238	select BOARD_LATE_INIT
1239	select DM
1240	select DM_GPIO
1241	select DM_I2C
1242	select DM_MMC
1243	select DM_RESET
1244	select DM_SERIAL
1245	select DM_USB
1246	select OF_BOARD_SETUP
1247	select OF_CONTROL
1248	select OF_LIBFDT
1249	select PINCTRL
1250	select SPL_BOARD_INIT if SPL
1251	select SPL_DM if SPL
1252	select SPL_LIBCOMMON_SUPPORT if SPL
1253	select SPL_LIBGENERIC_SUPPORT if SPL
1254	select SPL_OF_CONTROL if SPL
1255	select SPL_PINCTRL if SPL
1256	select SUPPORT_SPL
1257	imply CMD_DM
1258	imply DISTRO_DEFAULTS
1259	imply FAT_WRITE
1260	help
1261	  Support for UniPhier SoC family developed by Socionext Inc.
1262	  (formerly, System LSI Business Division of Panasonic Corporation)
1263
1264config STM32
1265	bool "Support STMicroelectronics STM32 MCU with cortex M"
1266	select CPU_V7M
1267	select DM
1268	select DM_SERIAL
1269	select SYS_THUMB_BUILD
1270	imply CMD_DM
1271
1272config ARCH_STI
1273	bool "Support STMicrolectronics SoCs"
1274	select BLK
1275	select CPU_V7A
1276	select DM
1277	select DM_MMC
1278	select DM_RESET
1279	select DM_SERIAL
1280	imply CMD_DM
1281	help
1282	  Support for STMicroelectronics STiH407/10 SoC family.
1283	  This SoC is used on Linaro 96Board STiH410-B2260
1284
1285config ARCH_STM32MP
1286	bool "Support STMicroelectronics STM32MP Socs with cortex A"
1287	select ARCH_MISC_INIT
1288	select BOARD_LATE_INIT
1289	select CLK
1290	select DM
1291	select DM_GPIO
1292	select DM_RESET
1293	select DM_SERIAL
1294	select MISC
1295	select OF_CONTROL
1296	select OF_LIBFDT
1297	select PINCTRL
1298	select REGMAP
1299	select SUPPORT_SPL
1300	select SYSCON
1301	select SYSRESET
1302	select SYS_THUMB_BUILD
1303	imply CMD_DM
1304	help
1305	  Support for STM32MP SoC family developed by STMicroelectronics,
1306	  MPUs based on ARM cortex A core
1307	  U-BOOT is running in DDR and SPL support is the unsecure First Stage
1308	  BootLoader (FSBL)
1309
1310config ARCH_ROCKCHIP
1311	bool "Support Rockchip SoCs"
1312	select BLK
1313	select DM
1314	select DM_GPIO
1315	select DM_I2C
1316	select DM_MMC
1317	select DM_PWM
1318	select DM_REGULATOR
1319	select DM_SERIAL
1320	select DM_SPI
1321	select DM_SPI_FLASH
1322	select DM_USB if USB
1323	select ENABLE_ARM_SOC_BOOT0_HOOK
1324	select OF_CONTROL
1325	select SPI
1326	select SPL_DM if SPL
1327	select SPL_SYS_MALLOC_SIMPLE if SPL
1328	select SYS_MALLOC_F
1329	select SYS_THUMB_BUILD if !ARM64
1330	imply ADC
1331	imply CMD_DM
1332	imply DISTRO_DEFAULTS
1333	imply FAT_WRITE
1334	imply SARADC_ROCKCHIP
1335	imply SPL_SYSRESET
1336	imply SYS_NS16550
1337	imply TPL_SYSRESET
1338	imply USB_FUNCTION_FASTBOOT
1339
1340config TARGET_THUNDERX_88XX
1341	bool "Support ThunderX 88xx"
1342	select ARM64
1343	select OF_CONTROL
1344	select PL01X_SERIAL
1345	select SYS_CACHE_SHIFT_7
1346
1347config ARCH_ASPEED
1348	bool "Support Aspeed SoCs"
1349	select DM
1350	select OF_CONTROL
1351	imply CMD_DM
1352
1353endchoice
1354
1355config TI_SECURE_DEVICE
1356	bool "HS Device Type Support"
1357	depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
1358	help
1359	  If a high secure (HS) device type is being used, this config
1360	  must be set. This option impacts various aspects of the
1361	  build system (to create signed boot images that can be
1362	  authenticated) and the code. See the doc/README.ti-secure
1363	  file for further details.
1364
1365source "arch/arm/mach-aspeed/Kconfig"
1366
1367source "arch/arm/mach-at91/Kconfig"
1368
1369source "arch/arm/mach-bcm283x/Kconfig"
1370
1371source "arch/arm/mach-bcmstb/Kconfig"
1372
1373source "arch/arm/mach-davinci/Kconfig"
1374
1375source "arch/arm/mach-exynos/Kconfig"
1376
1377source "arch/arm/mach-highbank/Kconfig"
1378
1379source "arch/arm/mach-integrator/Kconfig"
1380
1381source "arch/arm/mach-keystone/Kconfig"
1382
1383source "arch/arm/mach-kirkwood/Kconfig"
1384
1385source "arch/arm/mach-mvebu/Kconfig"
1386
1387source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1388
1389source "arch/arm/mach-imx/mx2/Kconfig"
1390
1391source "arch/arm/mach-imx/mx3/Kconfig"
1392
1393source "arch/arm/mach-imx/mx5/Kconfig"
1394
1395source "arch/arm/mach-imx/mx6/Kconfig"
1396
1397source "arch/arm/mach-imx/mx7/Kconfig"
1398
1399source "arch/arm/mach-imx/mx7ulp/Kconfig"
1400
1401source "arch/arm/mach-imx/mx8m/Kconfig"
1402
1403source "arch/arm/mach-imx/mxs/Kconfig"
1404
1405source "arch/arm/mach-omap2/Kconfig"
1406
1407source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1408
1409source "arch/arm/mach-orion5x/Kconfig"
1410
1411source "arch/arm/mach-owl/Kconfig"
1412
1413source "arch/arm/mach-rmobile/Kconfig"
1414
1415source "arch/arm/mach-meson/Kconfig"
1416
1417source "arch/arm/mach-qemu/Kconfig"
1418
1419source "arch/arm/mach-rockchip/Kconfig"
1420
1421source "arch/arm/mach-s5pc1xx/Kconfig"
1422
1423source "arch/arm/mach-snapdragon/Kconfig"
1424
1425source "arch/arm/mach-socfpga/Kconfig"
1426
1427source "arch/arm/mach-sti/Kconfig"
1428
1429source "arch/arm/mach-stm32/Kconfig"
1430
1431source "arch/arm/mach-stm32mp/Kconfig"
1432
1433source "arch/arm/mach-sunxi/Kconfig"
1434
1435source "arch/arm/mach-tegra/Kconfig"
1436
1437source "arch/arm/mach-uniphier/Kconfig"
1438
1439source "arch/arm/cpu/armv7/vf610/Kconfig"
1440
1441source "arch/arm/mach-zynq/Kconfig"
1442
1443source "arch/arm/mach-zynqmp-r5/Kconfig"
1444
1445source "arch/arm/cpu/armv7/Kconfig"
1446
1447source "arch/arm/cpu/armv8/zynqmp/Kconfig"
1448
1449source "arch/arm/cpu/armv8/Kconfig"
1450
1451source "arch/arm/mach-imx/Kconfig"
1452
1453source "board/bosch/shc/Kconfig"
1454source "board/CarMediaLab/flea3/Kconfig"
1455source "board/Marvell/aspenite/Kconfig"
1456source "board/Marvell/gplugd/Kconfig"
1457source "board/armadeus/apf27/Kconfig"
1458source "board/armltd/vexpress/Kconfig"
1459source "board/armltd/vexpress64/Kconfig"
1460source "board/broadcom/bcm23550_w1d/Kconfig"
1461source "board/broadcom/bcm28155_ap/Kconfig"
1462source "board/broadcom/bcmcygnus/Kconfig"
1463source "board/broadcom/bcmnsp/Kconfig"
1464source "board/broadcom/bcmns2/Kconfig"
1465source "board/cavium/thunderx/Kconfig"
1466source "board/cirrus/edb93xx/Kconfig"
1467source "board/eets/pdu001/Kconfig"
1468source "board/freescale/ls2080a/Kconfig"
1469source "board/freescale/ls2080aqds/Kconfig"
1470source "board/freescale/ls2080ardb/Kconfig"
1471source "board/freescale/ls1088a/Kconfig"
1472source "board/freescale/ls1021aqds/Kconfig"
1473source "board/freescale/ls1043aqds/Kconfig"
1474source "board/freescale/ls1021atwr/Kconfig"
1475source "board/freescale/ls1021aiot/Kconfig"
1476source "board/freescale/ls1046aqds/Kconfig"
1477source "board/freescale/ls1043ardb/Kconfig"
1478source "board/freescale/ls1046ardb/Kconfig"
1479source "board/freescale/ls1012aqds/Kconfig"
1480source "board/freescale/ls1012ardb/Kconfig"
1481source "board/freescale/ls1012afrdm/Kconfig"
1482source "board/freescale/mx35pdk/Kconfig"
1483source "board/freescale/s32v234evb/Kconfig"
1484source "board/grinn/chiliboard/Kconfig"
1485source "board/gumstix/pepper/Kconfig"
1486source "board/h2200/Kconfig"
1487source "board/hisilicon/hikey/Kconfig"
1488source "board/hisilicon/poplar/Kconfig"
1489source "board/isee/igep003x/Kconfig"
1490source "board/phytec/pcm051/Kconfig"
1491source "board/silica/pengwyn/Kconfig"
1492source "board/spear/spear300/Kconfig"
1493source "board/spear/spear310/Kconfig"
1494source "board/spear/spear320/Kconfig"
1495source "board/spear/spear600/Kconfig"
1496source "board/spear/x600/Kconfig"
1497source "board/st/stv0991/Kconfig"
1498source "board/tcl/sl50/Kconfig"
1499source "board/ucRobotics/bubblegum_96/Kconfig"
1500source "board/birdland/bav335x/Kconfig"
1501source "board/timll/devkit3250/Kconfig"
1502source "board/toradex/colibri_pxa270/Kconfig"
1503source "board/vscom/baltos/Kconfig"
1504source "board/woodburn/Kconfig"
1505source "board/work-microwave/work_92105/Kconfig"
1506source "board/xilinx/Kconfig"
1507source "board/xilinx/zynq/Kconfig"
1508source "board/xilinx/zynqmp/Kconfig"
1509source "board/zipitz2/Kconfig"
1510
1511source "arch/arm/Kconfig.debug"
1512
1513endmenu
1514
1515config SPL_LDSCRIPT
1516	default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1517	default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1518	default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1519
1520
1521