xref: /openbmc/u-boot/arch/arm/Kconfig (revision 61b4dbb0)
1menu "ARM architecture"
2	depends on ARM
3
4config SYS_ARCH
5	default "arm"
6
7config ARM64
8	bool
9	select PHYS_64BIT
10	select SYS_CACHE_SHIFT_6
11
12if ARM64
13config POSITION_INDEPENDENT
14	bool "Generate position-independent pre-relocation code"
15	help
16	  U-Boot expects to be linked to a specific hard-coded address, and to
17	  be loaded to and run from that address. This option lifts that
18	  restriction, thus allowing the code to be loaded to and executed
19	  from almost any address. This logic relies on the relocation
20	  information that is embedded into the binary to support U-Boot
21	  relocating itself to the top-of-RAM later during execution.
22
23config SYS_INIT_SP_BSS_OFFSET
24	int
25	help
26	  U-Boot typically uses a hard-coded value for the stack pointer
27	  before relocation. Define this option to instead calculate the
28	  initial SP at run-time. This is useful to avoid hard-coding addresses
29	  into U-Boot, so that can be loaded and executed at arbitrary
30	  addresses and thus avoid using arbitrary addresses at runtime. This
31	  option's value is the offset added to &_bss_start in order to
32	  calculate the stack pointer. This offset should be large enough so
33	  that the early malloc region, global data (gd), and early stack usage
34	  do not overlap any appended DTB.
35
36config LINUX_KERNEL_IMAGE_HEADER
37	bool
38	help
39	  Place a Linux kernel image header at the start of the U-Boot binary.
40	  The format of the header is described in the Linux kernel source at
41	  Documentation/arm64/booting.txt. This feature is useful since the
42	  image header reports the amount of memory (BSS and similar) that
43	  U-Boot needs to use, but which isn't part of the binary.
44
45if LINUX_KERNEL_IMAGE_HEADER
46config LNX_KRNL_IMG_TEXT_OFFSET_BASE
47	hex
48	help
49	  The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
50	  TEXT_OFFSET value written in to the Linux kernel image header.
51endif
52endif
53
54config STATIC_RELA
55	bool
56	default y if ARM64 && !POSITION_INDEPENDENT
57
58config DMA_ADDR_T_64BIT
59	bool
60	default y if ARM64
61
62config HAS_VBAR
63	bool
64
65config HAS_THUMB2
66	bool
67
68# Used for compatibility with asm files copied from the kernel
69config ARM_ASM_UNIFIED
70	bool
71	default y
72
73# Used for compatibility with asm files copied from the kernel
74config THUMB2_KERNEL
75	bool
76
77config SYS_ARM_CACHE_CP15
78	bool "CP15 based cache enabling support"
79	help
80	  Select this if your processor suports enabling caches by using
81	  CP15 registers.
82
83config SYS_ARM_MMU
84	bool "MMU-based Paged Memory Management Support"
85	select SYS_ARM_CACHE_CP15
86	help
87	  Select if you want MMU-based virtualised addressing space
88	  support by paged memory management.
89
90config SYS_ARM_MPU
91	bool 'Use the ARM v7 PMSA Compliant MPU'
92	help
93	  Some ARM systems without an MMU have instead a Memory Protection
94	  Unit (MPU) that defines the type and permissions for regions of
95	  memory.
96	  If your CPU has an MPU then you should choose 'y' here unless you
97	  know that you do not want to use the MPU.
98
99# If set, the workarounds for these ARM errata are applied early during U-Boot
100# startup. Note that in general these options force the workarounds to be
101# applied; no CPU-type/version detection exists, unlike the similar options in
102# the Linux kernel. Do not set these options unless they apply!  Also note that
103# the following can be machine specific errata. These do have ability to
104# provide rudimentary version and machine specific checks, but expect no
105# product checks:
106# CONFIG_ARM_ERRATA_430973
107# CONFIG_ARM_ERRATA_454179
108# CONFIG_ARM_ERRATA_621766
109# CONFIG_ARM_ERRATA_798870
110# CONFIG_ARM_ERRATA_801819
111# CONFIG_ARM_CORTEX_A8_CVE_2017_5715
112# CONFIG_ARM_CORTEX_A15_CVE_2017_5715
113
114config ARM_ERRATA_430973
115	bool
116
117config ARM_ERRATA_454179
118	bool
119
120config ARM_ERRATA_621766
121	bool
122
123config ARM_ERRATA_716044
124	bool
125
126config ARM_ERRATA_725233
127	bool
128
129config ARM_ERRATA_742230
130	bool
131
132config ARM_ERRATA_743622
133	bool
134
135config ARM_ERRATA_751472
136	bool
137
138config ARM_ERRATA_761320
139	bool
140
141config ARM_ERRATA_773022
142	bool
143
144config ARM_ERRATA_774769
145	bool
146
147config ARM_ERRATA_794072
148	bool
149
150config ARM_ERRATA_798870
151	bool
152
153config ARM_ERRATA_801819
154	bool
155
156config ARM_ERRATA_826974
157	bool
158
159config ARM_ERRATA_828024
160	bool
161
162config ARM_ERRATA_829520
163	bool
164
165config ARM_ERRATA_833069
166	bool
167
168config ARM_ERRATA_833471
169	bool
170
171config ARM_ERRATA_845369
172	bool
173
174config ARM_ERRATA_852421
175	bool
176
177config ARM_ERRATA_852423
178	bool
179
180config ARM_ERRATA_855873
181	bool
182
183config ARM_CORTEX_A8_CVE_2017_5715
184	bool
185
186config ARM_CORTEX_A15_CVE_2017_5715
187	bool
188
189config CPU_ARM720T
190	bool
191	select SYS_CACHE_SHIFT_5
192	imply SYS_ARM_MMU
193
194config CPU_ARM920T
195	bool
196	select SYS_CACHE_SHIFT_5
197	imply SYS_ARM_MMU
198
199config CPU_ARM926EJS
200	bool
201	select SYS_CACHE_SHIFT_5
202	imply SYS_ARM_MMU
203
204config CPU_ARM946ES
205	bool
206	select SYS_CACHE_SHIFT_5
207	imply SYS_ARM_MMU
208
209config CPU_ARM1136
210	bool
211	select SYS_CACHE_SHIFT_5
212	imply SYS_ARM_MMU
213
214config CPU_ARM1176
215	bool
216	select HAS_VBAR
217	select SYS_CACHE_SHIFT_5
218	imply SYS_ARM_MMU
219
220config CPU_V7A
221	bool
222	select HAS_THUMB2
223	select HAS_VBAR
224	select SYS_CACHE_SHIFT_6
225	imply SYS_ARM_MMU
226
227config CPU_V7M
228	bool
229	select HAS_THUMB2
230	select SYS_ARM_MPU
231	select SYS_CACHE_SHIFT_5
232	select SYS_THUMB_BUILD
233	select THUMB2_KERNEL
234
235config CPU_V7R
236	bool
237	select HAS_THUMB2
238	select SYS_ARM_CACHE_CP15
239	select SYS_ARM_MPU
240	select SYS_CACHE_SHIFT_6
241
242config CPU_PXA
243	bool
244	select SYS_CACHE_SHIFT_5
245	imply SYS_ARM_MMU
246
247config CPU_SA1100
248	bool
249	select SYS_CACHE_SHIFT_5
250	imply SYS_ARM_MMU
251
252config SYS_CPU
253	default "arm720t" if CPU_ARM720T
254	default "arm920t" if CPU_ARM920T
255	default "arm926ejs" if CPU_ARM926EJS
256	default "arm946es" if CPU_ARM946ES
257	default "arm1136" if CPU_ARM1136
258	default "arm1176" if CPU_ARM1176
259	default "armv7" if CPU_V7A
260	default "armv7" if CPU_V7R
261	default "armv7m" if CPU_V7M
262	default "pxa" if CPU_PXA
263	default "sa1100" if CPU_SA1100
264	default "armv8" if ARM64
265
266config SYS_ARM_ARCH
267	int
268	default 4 if CPU_ARM720T
269	default 4 if CPU_ARM920T
270	default 5 if CPU_ARM926EJS
271	default 5 if CPU_ARM946ES
272	default 6 if CPU_ARM1136
273	default 6 if CPU_ARM1176
274	default 7 if CPU_V7A
275	default 7 if CPU_V7M
276	default 7 if CPU_V7R
277	default 5 if CPU_PXA
278	default 4 if CPU_SA1100
279	default 8 if ARM64
280
281config SYS_CACHE_SHIFT_5
282	bool
283
284config SYS_CACHE_SHIFT_6
285	bool
286
287config SYS_CACHE_SHIFT_7
288	bool
289
290config SYS_CACHELINE_SIZE
291	int
292	default 128 if SYS_CACHE_SHIFT_7
293	default 64 if SYS_CACHE_SHIFT_6
294	default 32 if SYS_CACHE_SHIFT_5
295
296config SYS_ARCH_TIMER
297	bool "ARM Generic Timer support"
298	depends on CPU_V7A || ARM64
299	default y if ARM64
300	help
301	  The ARM Generic Timer (aka arch-timer) provides an architected
302	  interface to a timer source on an SoC.
303	  It is mandantory for ARMv8 implementation and widely available
304	  on ARMv7 systems.
305
306config ARM_SMCCC
307	bool "Support for ARM SMC Calling Convention (SMCCC)"
308	depends on CPU_V7A || ARM64
309	select ARM_PSCI_FW
310	help
311	  Say Y here if you want to enable ARM SMC Calling Convention.
312	  This should be enabled if U-Boot needs to communicate with system
313	  firmware (for example, PSCI) according to SMCCC.
314
315config SEMIHOSTING
316	bool "support boot from semihosting"
317	help
318	  In emulated environments, semihosting is a way for
319	  the hosted environment to call out to the emulator to
320	  retrieve files from the host machine.
321
322config SYS_THUMB_BUILD
323	bool "Build U-Boot using the Thumb instruction set"
324	depends on !ARM64
325	help
326	   Use this flag to build U-Boot using the Thumb instruction set for
327	   ARM architectures. Thumb instruction set provides better code
328	   density. For ARM architectures that support Thumb2 this flag will
329	   result in Thumb2 code generated by GCC.
330
331config SPL_SYS_THUMB_BUILD
332	bool "Build SPL using the Thumb instruction set"
333	default y if SYS_THUMB_BUILD
334	depends on !ARM64
335	help
336	   Use this flag to build SPL using the Thumb instruction set for
337	   ARM architectures. Thumb instruction set provides better code
338	   density. For ARM architectures that support Thumb2 this flag will
339	   result in Thumb2 code generated by GCC.
340
341config SYS_L2CACHE_OFF
342	bool "L2cache off"
343	help
344	  If SoC does not support L2CACHE or one do not want to enable
345	  L2CACHE, choose this option.
346
347config ENABLE_ARM_SOC_BOOT0_HOOK
348	bool "prepare BOOT0 header"
349	help
350	  If the SoC's BOOT0 requires a header area filled with (magic)
351	  values, then choose this option, and create a file included as
352	  <asm/arch/boot0.h> which contains the required assembler code.
353
354config ARM_CORTEX_CPU_IS_UP
355	bool
356	default n
357
358config USE_ARCH_MEMCPY
359	bool "Use an assembly optimized implementation of memcpy"
360	default y
361	depends on !ARM64
362	help
363	  Enable the generation of an optimized version of memcpy.
364	  Such implementation may be faster under some conditions
365	  but may increase the binary size.
366
367config SPL_USE_ARCH_MEMCPY
368	bool "Use an assembly optimized implementation of memcpy for SPL"
369	default y if USE_ARCH_MEMCPY
370	depends on !ARM64
371	help
372	  Enable the generation of an optimized version of memcpy.
373	  Such implementation may be faster under some conditions
374	  but may increase the binary size.
375
376config USE_ARCH_MEMSET
377	bool "Use an assembly optimized implementation of memset"
378	default y
379	depends on !ARM64
380	help
381	  Enable the generation of an optimized version of memset.
382	  Such implementation may be faster under some conditions
383	  but may increase the binary size.
384
385config SPL_USE_ARCH_MEMSET
386	bool "Use an assembly optimized implementation of memset for SPL"
387	default y if USE_ARCH_MEMSET
388	depends on !ARM64
389	help
390	  Enable the generation of an optimized version of memset.
391	  Such implementation may be faster under some conditions
392	  but may increase the binary size.
393
394config ARM64_SUPPORT_AARCH32
395	bool "ARM64 system support AArch32 execution state"
396	default y if ARM64 && !TARGET_THUNDERX_88XX
397	help
398	  This ARM64 system supports AArch32 execution state.
399
400choice
401	prompt "Target select"
402	default TARGET_HIKEY
403
404config ARCH_AT91
405	bool "Atmel AT91"
406	select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
407
408config TARGET_EDB93XX
409	bool "Support edb93xx"
410	select CPU_ARM920T
411	select PL010_SERIAL
412
413config TARGET_ASPENITE
414	bool "Support aspenite"
415	select CPU_ARM926EJS
416
417config TARGET_GPLUGD
418	bool "Support gplugd"
419	select CPU_ARM926EJS
420
421config ARCH_DAVINCI
422	bool "TI DaVinci"
423	select CPU_ARM926EJS
424	imply CMD_SAVES
425	help
426	  Support for TI's DaVinci platform.
427
428config KIRKWOOD
429	bool "Marvell Kirkwood"
430	select ARCH_MISC_INIT
431	select BOARD_EARLY_INIT_F
432	select CPU_ARM926EJS
433
434config ARCH_MVEBU
435	bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
436	select DM
437	select DM_ETH
438	select DM_SERIAL
439	select DM_SPI
440	select DM_SPI_FLASH
441	select OF_CONTROL
442	select OF_SEPARATE
443	select SPI
444	imply CMD_DM
445
446config TARGET_APF27
447	bool "Support apf27"
448	select CPU_ARM926EJS
449	select SUPPORT_SPL
450
451config ORION5X
452	bool "Marvell Orion"
453	select CPU_ARM926EJS
454
455config TARGET_SPEAR300
456	bool "Support spear300"
457	select BOARD_EARLY_INIT_F
458	select CPU_ARM926EJS
459	select PL011_SERIAL
460	imply CMD_SAVES
461
462config TARGET_SPEAR310
463	bool "Support spear310"
464	select BOARD_EARLY_INIT_F
465	select CPU_ARM926EJS
466	select PL011_SERIAL
467	imply CMD_SAVES
468
469config TARGET_SPEAR320
470	bool "Support spear320"
471	select BOARD_EARLY_INIT_F
472	select CPU_ARM926EJS
473	select PL011_SERIAL
474	imply CMD_SAVES
475
476config TARGET_SPEAR600
477	bool "Support spear600"
478	select BOARD_EARLY_INIT_F
479	select CPU_ARM926EJS
480	select PL011_SERIAL
481	imply CMD_SAVES
482
483config TARGET_STV0991
484	bool "Support stv0991"
485	select CPU_V7A
486	select DM
487	select DM_SERIAL
488	select DM_SPI
489	select DM_SPI_FLASH
490	select PL01X_SERIAL
491	select SPI
492	select SPI_FLASH
493	imply CMD_DM
494
495config TARGET_X600
496	bool "Support x600"
497	select BOARD_LATE_INIT
498	select CPU_ARM926EJS
499	select PL011_SERIAL
500	select SUPPORT_SPL
501
502config TARGET_WOODBURN
503	bool "Support woodburn"
504	select CPU_ARM1136
505
506config TARGET_WOODBURN_SD
507	bool "Support woodburn_sd"
508	select CPU_ARM1136
509	select SUPPORT_SPL
510
511config TARGET_FLEA3
512	bool "Support flea3"
513	select CPU_ARM1136
514
515config TARGET_MX35PDK
516	bool "Support mx35pdk"
517	select BOARD_LATE_INIT
518	select CPU_ARM1136
519
520config ARCH_BCM283X
521	bool "Broadcom BCM283X family"
522	select DM
523	select DM_GPIO
524	select DM_SERIAL
525	select OF_CONTROL
526	select PL01X_SERIAL
527	select SERIAL_SEARCH_ALL
528	imply CMD_DM
529	imply FAT_WRITE
530
531config TARGET_VEXPRESS_CA15_TC2
532	bool "Support vexpress_ca15_tc2"
533	select CPU_V7A
534	select CPU_V7_HAS_NONSEC
535	select CPU_V7_HAS_VIRT
536	select PL011_SERIAL
537
538config ARCH_BCMSTB
539	bool "Broadcom BCM7XXX family"
540	select CPU_V7A
541	select DM
542	select OF_CONTROL
543	select OF_PRIOR_STAGE
544	imply CMD_DM
545	help
546	  This enables support for Broadcom ARM-based set-top box
547	  chipsets, including the 7445 family of chips.
548
549config TARGET_VEXPRESS_CA5X2
550	bool "Support vexpress_ca5x2"
551	select CPU_V7A
552	select PL011_SERIAL
553
554config TARGET_VEXPRESS_CA9X4
555	bool "Support vexpress_ca9x4"
556	select CPU_V7A
557	select PL011_SERIAL
558
559config TARGET_BCM23550_W1D
560	bool "Support bcm23550_w1d"
561	select CPU_V7A
562	imply CRC32_VERIFY
563	imply FAT_WRITE
564
565config TARGET_BCM28155_AP
566	bool "Support bcm28155_ap"
567	select CPU_V7A
568	imply CRC32_VERIFY
569	imply FAT_WRITE
570
571config TARGET_BCMCYGNUS
572	bool "Support bcmcygnus"
573	select CPU_V7A
574	imply BCM_SF2_ETH
575	imply BCM_SF2_ETH_GMAC
576	imply CMD_HASH
577	imply CRC32_VERIFY
578	imply FAT_WRITE
579	imply HASH_VERIFY
580	imply NETDEVICES
581
582config TARGET_BCMNSP
583	bool "Support bcmnsp"
584	select CPU_V7A
585
586config TARGET_BCMNS2
587	bool "Support Broadcom Northstar2"
588	select ARM64
589	help
590	  Support for Broadcom Northstar 2 SoCs.  NS2 is a quad-core 64-bit
591	  ARMv8 Cortex-A57 processors targeting a broad range of networking
592	  applications
593
594config ARCH_EXYNOS
595	bool "Samsung EXYNOS"
596	select DM
597	select DM_GPIO
598	select DM_I2C
599	select DM_KEYBOARD
600	select DM_SERIAL
601	select DM_SPI
602	select DM_SPI_FLASH
603	select SPI
604	imply CMD_DM
605	imply FAT_WRITE
606
607config ARCH_S5PC1XX
608	bool "Samsung S5PC1XX"
609	select CPU_V7A
610	select DM
611	select DM_GPIO
612	select DM_I2C
613	select DM_SERIAL
614	imply CMD_DM
615
616config ARCH_HIGHBANK
617	bool "Calxeda Highbank"
618	select CPU_V7A
619	select PL011_SERIAL
620
621config ARCH_INTEGRATOR
622	bool "ARM Ltd. Integrator family"
623	select DM
624	select DM_SERIAL
625	select PL01X_SERIAL
626	imply CMD_DM
627
628config ARCH_KEYSTONE
629	bool "TI Keystone"
630	select CMD_POWEROFF
631	select CPU_V7A
632	select SUPPORT_SPL
633	select SYS_ARCH_TIMER
634	select SYS_THUMB_BUILD
635	imply CMD_MTDPARTS
636	imply CMD_SAVES
637	imply FIT
638
639config ARCH_K3
640	bool "Texas Instruments' K3 Architecture"
641	select SPL
642	select SUPPORT_SPL
643	select FIT
644
645config ARCH_OMAP2PLUS
646	bool "TI OMAP2+"
647	select CPU_V7A
648	select SPL_BOARD_INIT if SPL
649	select SPL_STACK_R if SPL
650	select SUPPORT_SPL
651	imply FIT
652
653config ARCH_MESON
654	bool "Amlogic Meson"
655	imply DISTRO_DEFAULTS
656	help
657	  Support for the Meson SoC family developed by Amlogic Inc.,
658	  targeted at media players and tablet computers. We currently
659	  support the S905 (GXBaby) 64-bit SoC.
660
661config ARCH_LPC32XX
662	bool "NXP LPC32xx platform"
663	select CPU_ARM926EJS
664	select DM
665	select DM_GPIO
666	select DM_SERIAL
667	select SPL_DM if SPL
668	select SUPPORT_SPL
669	imply CMD_DM
670
671config ARCH_MX8M
672	bool "NXP i.MX8M platform"
673	select ARM64
674	select DM
675	select SUPPORT_SPL
676	imply CMD_DM
677
678config ARCH_MX23
679	bool "NXP i.MX23 family"
680	select CPU_ARM926EJS
681	select PL011_SERIAL
682	select SUPPORT_SPL
683
684config ARCH_MX25
685	bool "NXP MX25"
686	select CPU_ARM926EJS
687	imply MXC_GPIO
688
689config ARCH_MX28
690	bool "NXP i.MX28 family"
691	select CPU_ARM926EJS
692	select PL011_SERIAL
693	select SUPPORT_SPL
694
695config ARCH_MX31
696	bool "NXP i.MX31 family"
697	select CPU_ARM1136
698
699config ARCH_MX7ULP
700	bool "NXP MX7ULP"
701	select CPU_V7A
702	select ROM_UNIFIED_SECTIONS
703	imply MXC_GPIO
704
705config ARCH_MX7
706	bool "Freescale MX7"
707	select ARCH_MISC_INIT
708	select BOARD_EARLY_INIT_F
709	select CPU_V7A
710	select SYS_FSL_HAS_SEC if SECURE_BOOT
711	select SYS_FSL_SEC_COMPAT_4
712	select SYS_FSL_SEC_LE
713	imply MXC_GPIO
714
715config ARCH_MX6
716	bool "Freescale MX6"
717	select CPU_V7A
718	select SYS_FSL_HAS_SEC if SECURE_BOOT
719	select SYS_FSL_SEC_COMPAT_4
720	select SYS_FSL_SEC_LE
721	select SYS_THUMB_BUILD if SPL
722	imply MXC_GPIO
723
724if ARCH_MX6
725config SPL_LDSCRIPT
726	default "arch/arm/mach-omap2/u-boot-spl.lds"
727endif
728
729config ARCH_MX5
730	bool "Freescale MX5"
731	select BOARD_EARLY_INIT_F
732	select CPU_V7A
733	imply MXC_GPIO
734
735config ARCH_OWL
736	bool "Actions Semi OWL SoCs"
737	select ARM64
738	select DM
739	select DM_SERIAL
740	select OF_CONTROL
741	imply CMD_DM
742
743config ARCH_QEMU
744	bool "QEMU Virtual Platform"
745	select DM
746	select DM_SERIAL
747	select OF_CONTROL
748	select PL01X_SERIAL
749	imply CMD_DM
750	imply DM_RTC
751	imply RTC_PL031
752
753config ARCH_RMOBILE
754	bool "Renesas ARM SoCs"
755	select BOARD_EARLY_INIT_F
756	select DM
757	select DM_SERIAL
758	imply CMD_DM
759	imply FAT_WRITE
760	imply SYS_THUMB_BUILD
761
762config TARGET_S32V234EVB
763	bool "Support s32v234evb"
764	select ARM64
765	select SYS_FSL_ERRATUM_ESDHC111
766
767config ARCH_SNAPDRAGON
768	bool "Qualcomm Snapdragon SoCs"
769	select ARM64
770	select DM
771	select DM_GPIO
772	select DM_SERIAL
773	select MSM_SMEM
774	select OF_CONTROL
775	select OF_SEPARATE
776	select SMEM
777	select SPMI
778	imply CMD_DM
779
780config ARCH_SOCFPGA
781	bool "Altera SOCFPGA family"
782	select ARCH_EARLY_INIT_R
783	select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
784	select ARM64 if TARGET_SOCFPGA_STRATIX10
785	select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
786	select DM
787	select DM_SERIAL
788	select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
789	select OF_CONTROL
790	select SPL_DM_RESET if DM_RESET
791	select SPL_DM_SERIAL
792	select SPL_LIBCOMMON_SUPPORT
793	select SPL_LIBDISK_SUPPORT
794	select SPL_LIBGENERIC_SUPPORT
795	select SPL_MMC_SUPPORT if DM_MMC
796	select SPL_NAND_SUPPORT if SPL_NAND_DENALI
797	select SPL_OF_CONTROL
798	select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
799	select SPL_SERIAL_SUPPORT
800	select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
801	select SPL_SPI_SUPPORT if DM_SPI
802	select SPL_WATCHDOG_SUPPORT
803	select SUPPORT_SPL
804	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
805	select SYS_NS16550
806	select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
807	imply CMD_DM
808	imply CMD_MTDPARTS
809	imply CRC32_VERIFY
810	imply DM_SPI
811	imply DM_SPI_FLASH
812	imply FAT_WRITE
813	imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
814
815config ARCH_SUNXI
816	bool "Support sunxi (Allwinner) SoCs"
817	select BINMAN
818	select CMD_GPIO
819	select CMD_MMC if MMC
820	select CMD_USB if DISTRO_DEFAULTS
821	select DM
822	select DM_ETH
823	select DM_GPIO
824	select DM_KEYBOARD
825	select DM_SERIAL
826	select DM_USB if DISTRO_DEFAULTS
827	select OF_BOARD_SETUP
828	select OF_CONTROL
829	select OF_SEPARATE
830	select SPECIFY_CONSOLE_INDEX
831	select SPL_STACK_R if SPL
832	select SPL_SYS_MALLOC_SIMPLE if SPL
833	select SPL_SYS_THUMB_BUILD if !ARM64
834	select SYS_NS16550
835	select SYS_THUMB_BUILD if !ARM64
836	select USB if DISTRO_DEFAULTS
837	select USB_KEYBOARD if DISTRO_DEFAULTS
838	select USB_STORAGE if DISTRO_DEFAULTS
839	select USE_TINY_PRINTF
840	imply CMD_DM
841	imply CMD_GPT
842	imply CMD_UBI if NAND
843	imply DISTRO_DEFAULTS
844	imply FAT_WRITE
845	imply OF_LIBFDT_OVERLAY
846	imply PRE_CONSOLE_BUFFER
847	imply SPL_GPIO_SUPPORT
848	imply SPL_LIBCOMMON_SUPPORT
849	imply SPL_LIBDISK_SUPPORT
850	imply SPL_LIBGENERIC_SUPPORT
851	imply SPL_MMC_SUPPORT if MMC
852	imply SPL_POWER_SUPPORT
853	imply SPL_SERIAL_SUPPORT
854	imply USB_GADGET
855
856config ARCH_VERSAL
857	bool "Support Xilinx Versal Platform"
858	select ARM64
859	select CLK
860	select DM
861	select DM_SERIAL
862	select OF_CONTROL
863
864config ARCH_VF610
865	bool "Freescale Vybrid"
866	select CPU_V7A
867	select SYS_FSL_ERRATUM_ESDHC111
868	imply CMD_MTDPARTS
869	imply NAND
870
871config ARCH_ZYNQ
872	bool "Xilinx Zynq based platform"
873	select BOARD_EARLY_INIT_F if WDT
874	select CLK
875	select CLK_ZYNQ
876	select CPU_V7A
877	select DM
878	select DM_ETH if NET
879	select DM_MMC if MMC
880	select DM_SERIAL
881	select DM_SPI
882	select DM_SPI_FLASH
883	select DM_USB if USB
884	select OF_CONTROL
885	select SPI
886	select SPL_BOARD_INIT if SPL
887	select SPL_CLK if SPL
888	select SPL_DM if SPL
889	select SPL_OF_CONTROL if SPL
890	select SPL_SEPARATE_BSS if SPL
891	select SUPPORT_SPL
892	imply ARCH_EARLY_INIT_R
893	imply BOARD_LATE_INIT
894	imply CMD_CLK
895	imply CMD_DM
896	imply CMD_SPL
897	imply FAT_WRITE
898
899config ARCH_ZYNQMP_R5
900	bool "Xilinx ZynqMP R5 based platform"
901	select CLK
902	select CPU_V7R
903	select DM
904	select DM_SERIAL
905	select OF_CONTROL
906	imply CMD_DM
907
908config ARCH_ZYNQMP
909	bool "Xilinx ZynqMP based platform"
910	select ARM64
911	select CLK
912	select DM
913	select DM_SERIAL
914	select DM_USB if USB
915	select OF_CONTROL
916	select SPL_BOARD_INIT if SPL
917	select SPL_CLK if SPL
918	select SUPPORT_SPL
919	imply BOARD_LATE_INIT
920	imply CMD_DM
921	imply FAT_WRITE
922	imply MP
923
924config TEGRA
925	bool "NVIDIA Tegra"
926	imply DISTRO_DEFAULTS
927	imply FAT_WRITE
928
929config TARGET_VEXPRESS64_AEMV8A
930	bool "Support vexpress_aemv8a"
931	select ARM64
932	select PL01X_SERIAL
933
934config TARGET_VEXPRESS64_BASE_FVP
935	bool "Support Versatile Express ARMv8a FVP BASE model"
936	select ARM64
937	select PL01X_SERIAL
938	select SEMIHOSTING
939
940config TARGET_VEXPRESS64_BASE_FVP_DRAM
941	bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
942	select ARM64
943	select PL01X_SERIAL
944	help
945	  This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
946	  the default config to allow the user to load the images directly into
947	  DRAM using model parameters rather than by using semi-hosting to load
948	  the files from the host filesystem.
949
950config TARGET_VEXPRESS64_JUNO
951	bool "Support Versatile Express Juno Development Platform"
952	select ARM64
953	select PL01X_SERIAL
954
955config TARGET_LS2080A_EMU
956	bool "Support ls2080a_emu"
957	select ARCH_LS2080A
958	select ARCH_MISC_INIT
959	select ARM64
960	select ARMV8_MULTIENTRY
961	help
962	  Support for Freescale LS2080A_EMU platform
963	  The LS2080A Development System (EMULATOR) is a pre silicon
964	  development platform that supports the QorIQ LS2080A
965	  Layerscape Architecture processor.
966
967config TARGET_LS2080A_SIMU
968	bool "Support ls2080a_simu"
969	select ARCH_LS2080A
970	select ARCH_MISC_INIT
971	select ARM64
972	select ARMV8_MULTIENTRY
973	help
974	  Support for Freescale LS2080A_SIMU platform
975	  The LS2080A Development System (QDS) is a pre silicon
976	  development platform that supports the QorIQ LS2080A
977	  Layerscape Architecture processor.
978
979config TARGET_LS1088AQDS
980	bool "Support ls1088aqds"
981	select ARCH_LS1088A
982	select ARCH_MISC_INIT
983	select ARM64
984	select ARMV8_MULTIENTRY
985	select BOARD_LATE_INIT
986	select SUPPORT_SPL
987	help
988	  Support for NXP LS1088AQDS platform
989	  The LS1088A Development System (QDS) is a high-performance
990	  development platform that supports the QorIQ LS1088A
991	  Layerscape Architecture processor.
992
993config TARGET_LS2080AQDS
994	bool "Support ls2080aqds"
995	select ARCH_LS2080A
996	select ARCH_MISC_INIT
997	select ARM64
998	select ARMV8_MULTIENTRY
999	select BOARD_LATE_INIT
1000	select SUPPORT_SPL
1001	imply SCSI
1002	imply SCSI_AHCI
1003	help
1004	  Support for Freescale LS2080AQDS platform
1005	  The LS2080A Development System (QDS) is a high-performance
1006	  development platform that supports the QorIQ LS2080A
1007	  Layerscape Architecture processor.
1008
1009config TARGET_LS2080ARDB
1010	bool "Support ls2080ardb"
1011	select ARCH_LS2080A
1012	select ARCH_MISC_INIT
1013	select ARM64
1014	select ARMV8_MULTIENTRY
1015	select BOARD_LATE_INIT
1016	select SUPPORT_SPL
1017	imply SCSI
1018	imply SCSI_AHCI
1019	help
1020	  Support for Freescale LS2080ARDB platform.
1021	  The LS2080A Reference design board (RDB) is a high-performance
1022	  development platform that supports the QorIQ LS2080A
1023	  Layerscape Architecture processor.
1024
1025config TARGET_LS2081ARDB
1026	bool "Support ls2081ardb"
1027	select ARCH_LS2080A
1028	select ARCH_MISC_INIT
1029	select ARM64
1030	select ARMV8_MULTIENTRY
1031	select BOARD_LATE_INIT
1032	select SUPPORT_SPL
1033	help
1034	  Support for Freescale LS2081ARDB platform.
1035	  The LS2081A Reference design board (RDB) is a high-performance
1036	  development platform that supports the QorIQ LS2081A/LS2041A
1037	  Layerscape Architecture processor.
1038
1039config TARGET_HIKEY
1040	bool "Support HiKey 96boards Consumer Edition Platform"
1041	select ARM64
1042	select DM
1043	select DM_GPIO
1044	select DM_SERIAL
1045	select OF_CONTROL
1046	select PL01X_SERIAL
1047	select SPECIFY_CONSOLE_INDEX
1048	imply CMD_DM
1049	  help
1050	  Support for HiKey 96boards platform. It features a HI6220
1051	  SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1052
1053config TARGET_POPLAR
1054	bool "Support Poplar 96boards Enterprise Edition Platform"
1055	select ARM64
1056	select DM
1057	select DM_SERIAL
1058	select DM_USB
1059	select OF_CONTROL
1060	select PL01X_SERIAL
1061	imply CMD_DM
1062	  help
1063	  Support for Poplar 96boards EE platform. It features a HI3798cv200
1064	  SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1065	  making it capable of running any commercial set-top solution based on
1066	  Linux or Android.
1067
1068config TARGET_LS1012AQDS
1069	bool "Support ls1012aqds"
1070	select ARCH_LS1012A
1071	select ARM64
1072	select BOARD_LATE_INIT
1073	help
1074	  Support for Freescale LS1012AQDS platform.
1075	  The LS1012A Development System (QDS) is a high-performance
1076	  development platform that supports the QorIQ LS1012A
1077	  Layerscape Architecture processor.
1078
1079config TARGET_LS1012ARDB
1080	bool "Support ls1012ardb"
1081	select ARCH_LS1012A
1082	select ARM64
1083	select BOARD_LATE_INIT
1084	imply SCSI
1085	imply SCSI_AHCI
1086	help
1087	  Support for Freescale LS1012ARDB platform.
1088	  The LS1012A Reference design board (RDB) is a high-performance
1089	  development platform that supports the QorIQ LS1012A
1090	  Layerscape Architecture processor.
1091
1092config TARGET_LS1012A2G5RDB
1093	bool "Support ls1012a2g5rdb"
1094	select ARCH_LS1012A
1095	select ARM64
1096	select BOARD_LATE_INIT
1097	imply SCSI
1098	help
1099	  Support for Freescale LS1012A2G5RDB platform.
1100	  The LS1012A 2G5 Reference design board (RDB) is a high-performance
1101	  development platform that supports the QorIQ LS1012A
1102	  Layerscape Architecture processor.
1103
1104config TARGET_LS1012AFRWY
1105	bool "Support ls1012afrwy"
1106	select ARCH_LS1012A
1107	select ARM64
1108	select BOARD_LATE_INIT
1109	imply SCSI
1110	imply SCSI_AHCI
1111	help
1112	 Support for Freescale LS1012AFRWY platform.
1113	 The LS1012A FRWY board (FRWY) is a high-performance
1114	 development platform that supports the QorIQ LS1012A
1115	 Layerscape Architecture processor.
1116
1117config TARGET_LS1012AFRDM
1118	bool "Support ls1012afrdm"
1119	select ARCH_LS1012A
1120	select ARM64
1121	help
1122	  Support for Freescale LS1012AFRDM platform.
1123	  The LS1012A Freedom  board (FRDM) is a high-performance
1124	  development platform that supports the QorIQ LS1012A
1125	  Layerscape Architecture processor.
1126
1127config TARGET_LS1088ARDB
1128	bool "Support ls1088ardb"
1129	select ARCH_LS1088A
1130	select ARCH_MISC_INIT
1131	select ARM64
1132	select ARMV8_MULTIENTRY
1133	select BOARD_LATE_INIT
1134	select SUPPORT_SPL
1135	help
1136	  Support for NXP LS1088ARDB platform.
1137	  The LS1088A Reference design board (RDB) is a high-performance
1138	  development platform that supports the QorIQ LS1088A
1139	  Layerscape Architecture processor.
1140
1141config TARGET_LS1021AQDS
1142	bool "Support ls1021aqds"
1143	select ARCH_LS1021A
1144	select ARCH_SUPPORT_PSCI
1145	select BOARD_EARLY_INIT_F
1146	select BOARD_LATE_INIT
1147	select CPU_V7A
1148	select CPU_V7_HAS_NONSEC
1149	select CPU_V7_HAS_VIRT
1150	select LS1_DEEP_SLEEP
1151	select SUPPORT_SPL
1152	select SYS_FSL_DDR
1153	imply SCSI
1154
1155config TARGET_LS1021ATWR
1156	bool "Support ls1021atwr"
1157	select ARCH_LS1021A
1158	select ARCH_SUPPORT_PSCI
1159	select BOARD_EARLY_INIT_F
1160	select BOARD_LATE_INIT
1161	select CPU_V7A
1162	select CPU_V7_HAS_NONSEC
1163	select CPU_V7_HAS_VIRT
1164	select LS1_DEEP_SLEEP
1165	select SUPPORT_SPL
1166	imply SCSI
1167
1168config TARGET_LS1021AIOT
1169	bool "Support ls1021aiot"
1170	select ARCH_LS1021A
1171	select ARCH_SUPPORT_PSCI
1172	select BOARD_LATE_INIT
1173	select CPU_V7A
1174	select CPU_V7_HAS_NONSEC
1175	select CPU_V7_HAS_VIRT
1176	select SUPPORT_SPL
1177	imply SCSI
1178	help
1179	  Support for Freescale LS1021AIOT platform.
1180	  The LS1021A Freescale board (IOT) is a high-performance
1181	  development platform that supports the QorIQ LS1021A
1182	  Layerscape Architecture processor.
1183
1184config TARGET_LS1043AQDS
1185	bool "Support ls1043aqds"
1186	select ARCH_LS1043A
1187	select ARM64
1188	select ARMV8_MULTIENTRY
1189	select BOARD_EARLY_INIT_F
1190	select BOARD_LATE_INIT
1191	select SUPPORT_SPL
1192	imply SCSI
1193	help
1194	  Support for Freescale LS1043AQDS platform.
1195
1196config TARGET_LS1043ARDB
1197	bool "Support ls1043ardb"
1198	select ARCH_LS1043A
1199	select ARM64
1200	select ARMV8_MULTIENTRY
1201	select BOARD_EARLY_INIT_F
1202	select BOARD_LATE_INIT
1203	select SUPPORT_SPL
1204	imply SCSI
1205	help
1206	  Support for Freescale LS1043ARDB platform.
1207
1208config TARGET_LS1046AQDS
1209	bool "Support ls1046aqds"
1210	select ARCH_LS1046A
1211	select ARM64
1212	select ARMV8_MULTIENTRY
1213	select BOARD_EARLY_INIT_F
1214	select BOARD_LATE_INIT
1215	select DM_SPI_FLASH if DM_SPI
1216	select SUPPORT_SPL
1217	imply SCSI
1218	help
1219	  Support for Freescale LS1046AQDS platform.
1220	  The LS1046A Development System (QDS) is a high-performance
1221	  development platform that supports the QorIQ LS1046A
1222	  Layerscape Architecture processor.
1223
1224config TARGET_LS1046ARDB
1225	bool "Support ls1046ardb"
1226	select ARCH_LS1046A
1227	select ARM64
1228	select ARMV8_MULTIENTRY
1229	select BOARD_EARLY_INIT_F
1230	select BOARD_LATE_INIT
1231	select DM_SPI_FLASH if DM_SPI
1232	select POWER_MC34VR500
1233	select SUPPORT_SPL
1234	imply SCSI
1235	help
1236	  Support for Freescale LS1046ARDB platform.
1237	  The LS1046A Reference Design Board (RDB) is a high-performance
1238	  development platform that supports the QorIQ LS1046A
1239	  Layerscape Architecture processor.
1240
1241config TARGET_H2200
1242	bool "Support h2200"
1243	select CPU_PXA
1244
1245config TARGET_ZIPITZ2
1246	bool "Support zipitz2"
1247	select CPU_PXA
1248
1249config TARGET_COLIBRI_PXA270
1250	bool "Support colibri_pxa270"
1251	select CPU_PXA
1252
1253config ARCH_UNIPHIER
1254	bool "Socionext UniPhier SoCs"
1255	select BOARD_LATE_INIT
1256	select DM
1257	select DM_GPIO
1258	select DM_I2C
1259	select DM_MMC
1260	select DM_RESET
1261	select DM_SERIAL
1262	select DM_USB
1263	select OF_BOARD_SETUP
1264	select OF_CONTROL
1265	select OF_LIBFDT
1266	select PINCTRL
1267	select SPL_BOARD_INIT if SPL
1268	select SPL_DM if SPL
1269	select SPL_LIBCOMMON_SUPPORT if SPL
1270	select SPL_LIBGENERIC_SUPPORT if SPL
1271	select SPL_OF_CONTROL if SPL
1272	select SPL_PINCTRL if SPL
1273	select SUPPORT_SPL
1274	imply CMD_DM
1275	imply DISTRO_DEFAULTS
1276	imply FAT_WRITE
1277	help
1278	  Support for UniPhier SoC family developed by Socionext Inc.
1279	  (formerly, System LSI Business Division of Panasonic Corporation)
1280
1281config STM32
1282	bool "Support STMicroelectronics STM32 MCU with cortex M"
1283	select CPU_V7M
1284	select DM
1285	select DM_SERIAL
1286	imply CMD_DM
1287
1288config ARCH_STI
1289	bool "Support STMicrolectronics SoCs"
1290	select BLK
1291	select CPU_V7A
1292	select DM
1293	select DM_MMC
1294	select DM_RESET
1295	select DM_SERIAL
1296	imply CMD_DM
1297	help
1298	  Support for STMicroelectronics STiH407/10 SoC family.
1299	  This SoC is used on Linaro 96Board STiH410-B2260
1300
1301config ARCH_STM32MP
1302	bool "Support STMicroelectronics STM32MP Socs with cortex A"
1303	select ARCH_MISC_INIT
1304	select BOARD_LATE_INIT
1305	select CLK
1306	select DM
1307	select DM_GPIO
1308	select DM_RESET
1309	select DM_SERIAL
1310	select MISC
1311	select OF_CONTROL
1312	select OF_LIBFDT
1313	select PINCTRL
1314	select REGMAP
1315	select SUPPORT_SPL
1316	select SYSCON
1317	select SYSRESET
1318	select SYS_THUMB_BUILD
1319	imply CMD_DM
1320	help
1321	  Support for STM32MP SoC family developed by STMicroelectronics,
1322	  MPUs based on ARM cortex A core
1323	  U-BOOT is running in DDR and SPL support is the unsecure First Stage
1324	  BootLoader (FSBL)
1325
1326config ARCH_ROCKCHIP
1327	bool "Support Rockchip SoCs"
1328	select BLK
1329	select DM
1330	select DM_GPIO
1331	select DM_I2C
1332	select DM_MMC
1333	select DM_PWM
1334	select DM_REGULATOR
1335	select DM_SERIAL
1336	select DM_SPI
1337	select DM_SPI_FLASH
1338	select DM_USB if USB
1339	select ENABLE_ARM_SOC_BOOT0_HOOK
1340	select OF_CONTROL
1341	select SPI
1342	select SPL_DM if SPL
1343	select SPL_SYS_MALLOC_SIMPLE if SPL
1344	select SYS_MALLOC_F
1345	select SYS_THUMB_BUILD if !ARM64
1346	imply ADC
1347	imply CMD_DM
1348	imply DISTRO_DEFAULTS
1349	imply FAT_WRITE
1350	imply SARADC_ROCKCHIP
1351	imply SPL_SYSRESET
1352	imply SYS_NS16550
1353	imply TPL_SYSRESET
1354	imply USB_FUNCTION_FASTBOOT
1355
1356config TARGET_THUNDERX_88XX
1357	bool "Support ThunderX 88xx"
1358	select ARM64
1359	select OF_CONTROL
1360	select PL01X_SERIAL
1361	select SYS_CACHE_SHIFT_7
1362
1363config ARCH_ASPEED
1364	bool "Support Aspeed SoCs"
1365	select DM
1366	select OF_CONTROL
1367	imply CMD_DM
1368
1369endchoice
1370
1371config TI_SECURE_DEVICE
1372	bool "HS Device Type Support"
1373	depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
1374	help
1375	  If a high secure (HS) device type is being used, this config
1376	  must be set. This option impacts various aspects of the
1377	  build system (to create signed boot images that can be
1378	  authenticated) and the code. See the doc/README.ti-secure
1379	  file for further details.
1380
1381source "arch/arm/mach-aspeed/Kconfig"
1382
1383source "arch/arm/mach-at91/Kconfig"
1384
1385source "arch/arm/mach-bcm283x/Kconfig"
1386
1387source "arch/arm/mach-bcmstb/Kconfig"
1388
1389source "arch/arm/mach-davinci/Kconfig"
1390
1391source "arch/arm/mach-exynos/Kconfig"
1392
1393source "arch/arm/mach-highbank/Kconfig"
1394
1395source "arch/arm/mach-integrator/Kconfig"
1396
1397source "arch/arm/mach-k3/Kconfig"
1398
1399source "arch/arm/mach-keystone/Kconfig"
1400
1401source "arch/arm/mach-kirkwood/Kconfig"
1402
1403source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1404
1405source "arch/arm/mach-mvebu/Kconfig"
1406
1407source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1408
1409source "arch/arm/mach-imx/mx2/Kconfig"
1410
1411source "arch/arm/mach-imx/mx3/Kconfig"
1412
1413source "arch/arm/mach-imx/mx5/Kconfig"
1414
1415source "arch/arm/mach-imx/mx6/Kconfig"
1416
1417source "arch/arm/mach-imx/mx7/Kconfig"
1418
1419source "arch/arm/mach-imx/mx7ulp/Kconfig"
1420
1421source "arch/arm/mach-imx/mx8m/Kconfig"
1422
1423source "arch/arm/mach-imx/mxs/Kconfig"
1424
1425source "arch/arm/mach-omap2/Kconfig"
1426
1427source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1428
1429source "arch/arm/mach-orion5x/Kconfig"
1430
1431source "arch/arm/mach-owl/Kconfig"
1432
1433source "arch/arm/mach-rmobile/Kconfig"
1434
1435source "arch/arm/mach-meson/Kconfig"
1436
1437source "arch/arm/mach-qemu/Kconfig"
1438
1439source "arch/arm/mach-rockchip/Kconfig"
1440
1441source "arch/arm/mach-s5pc1xx/Kconfig"
1442
1443source "arch/arm/mach-snapdragon/Kconfig"
1444
1445source "arch/arm/mach-socfpga/Kconfig"
1446
1447source "arch/arm/mach-sti/Kconfig"
1448
1449source "arch/arm/mach-stm32/Kconfig"
1450
1451source "arch/arm/mach-stm32mp/Kconfig"
1452
1453source "arch/arm/mach-sunxi/Kconfig"
1454
1455source "arch/arm/mach-tegra/Kconfig"
1456
1457source "arch/arm/mach-uniphier/Kconfig"
1458
1459source "arch/arm/cpu/armv7/vf610/Kconfig"
1460
1461source "arch/arm/mach-zynq/Kconfig"
1462
1463source "arch/arm/mach-versal/Kconfig"
1464
1465source "arch/arm/mach-zynqmp-r5/Kconfig"
1466
1467source "arch/arm/cpu/armv7/Kconfig"
1468
1469source "arch/arm/cpu/armv8/zynqmp/Kconfig"
1470
1471source "arch/arm/cpu/armv8/Kconfig"
1472
1473source "arch/arm/mach-imx/Kconfig"
1474
1475source "board/bosch/shc/Kconfig"
1476source "board/CarMediaLab/flea3/Kconfig"
1477source "board/Marvell/aspenite/Kconfig"
1478source "board/Marvell/gplugd/Kconfig"
1479source "board/armadeus/apf27/Kconfig"
1480source "board/armltd/vexpress/Kconfig"
1481source "board/armltd/vexpress64/Kconfig"
1482source "board/broadcom/bcm23550_w1d/Kconfig"
1483source "board/broadcom/bcm28155_ap/Kconfig"
1484source "board/broadcom/bcmcygnus/Kconfig"
1485source "board/broadcom/bcmnsp/Kconfig"
1486source "board/broadcom/bcmns2/Kconfig"
1487source "board/cavium/thunderx/Kconfig"
1488source "board/cirrus/edb93xx/Kconfig"
1489source "board/eets/pdu001/Kconfig"
1490source "board/freescale/ls2080a/Kconfig"
1491source "board/freescale/ls2080aqds/Kconfig"
1492source "board/freescale/ls2080ardb/Kconfig"
1493source "board/freescale/ls1088a/Kconfig"
1494source "board/freescale/ls1021aqds/Kconfig"
1495source "board/freescale/ls1043aqds/Kconfig"
1496source "board/freescale/ls1021atwr/Kconfig"
1497source "board/freescale/ls1021aiot/Kconfig"
1498source "board/freescale/ls1046aqds/Kconfig"
1499source "board/freescale/ls1043ardb/Kconfig"
1500source "board/freescale/ls1046ardb/Kconfig"
1501source "board/freescale/ls1012aqds/Kconfig"
1502source "board/freescale/ls1012ardb/Kconfig"
1503source "board/freescale/ls1012afrdm/Kconfig"
1504source "board/freescale/mx35pdk/Kconfig"
1505source "board/freescale/s32v234evb/Kconfig"
1506source "board/grinn/chiliboard/Kconfig"
1507source "board/gumstix/pepper/Kconfig"
1508source "board/h2200/Kconfig"
1509source "board/hisilicon/hikey/Kconfig"
1510source "board/hisilicon/poplar/Kconfig"
1511source "board/isee/igep003x/Kconfig"
1512source "board/phytec/pcm051/Kconfig"
1513source "board/silica/pengwyn/Kconfig"
1514source "board/spear/spear300/Kconfig"
1515source "board/spear/spear310/Kconfig"
1516source "board/spear/spear320/Kconfig"
1517source "board/spear/spear600/Kconfig"
1518source "board/spear/x600/Kconfig"
1519source "board/st/stv0991/Kconfig"
1520source "board/tcl/sl50/Kconfig"
1521source "board/ucRobotics/bubblegum_96/Kconfig"
1522source "board/birdland/bav335x/Kconfig"
1523source "board/toradex/colibri_pxa270/Kconfig"
1524source "board/vscom/baltos/Kconfig"
1525source "board/woodburn/Kconfig"
1526source "board/xilinx/Kconfig"
1527source "board/xilinx/zynq/Kconfig"
1528source "board/xilinx/zynqmp/Kconfig"
1529source "board/zipitz2/Kconfig"
1530
1531source "arch/arm/Kconfig.debug"
1532
1533endmenu
1534
1535config SPL_LDSCRIPT
1536	default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1537	default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1538	default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1539
1540
1541