xref: /openbmc/u-boot/arch/arc/dts/nsim.dts (revision 14573fb7)
183d290c5STom Rini// SPDX-License-Identifier: GPL-2.0+
2cc8be222SAlexey Brodkin/*
3cc8be222SAlexey Brodkin * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
4cc8be222SAlexey Brodkin */
5cc8be222SAlexey Brodkin/dts-v1/;
6cc8be222SAlexey Brodkin
7cc8be222SAlexey Brodkin#include "skeleton.dtsi"
8cc8be222SAlexey Brodkin
9cc8be222SAlexey Brodkin/ {
10*c3dcd508SAlexey Brodkin	model = "snps,nsim";
11*c3dcd508SAlexey Brodkin
12cc8be222SAlexey Brodkin	aliases {
13cc8be222SAlexey Brodkin		console = &arcuart0;
14cc8be222SAlexey Brodkin	};
15cc8be222SAlexey Brodkin
160c77092eSVlad Zakharov	cpu_card {
170c77092eSVlad Zakharov		core_clk: core_clk {
180c77092eSVlad Zakharov			#clock-cells = <0>;
190c77092eSVlad Zakharov			compatible = "fixed-clock";
200c77092eSVlad Zakharov			clock-frequency = <70000000>;
210c77092eSVlad Zakharov			u-boot,dm-pre-reloc;
220c77092eSVlad Zakharov		};
230c77092eSVlad Zakharov	};
240c77092eSVlad Zakharov
25cc8be222SAlexey Brodkin	arcuart0: serial@0xc0fc1000 {
26cc8be222SAlexey Brodkin		compatible = "snps,arc-uart";
27cc8be222SAlexey Brodkin		reg = <0xc0fc1000 0x100>;
280c77092eSVlad Zakharov		clock-frequency = <70000000>;
29cc8be222SAlexey Brodkin	};
30cc8be222SAlexey Brodkin
31cc8be222SAlexey Brodkin};
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