1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2017 Synopsys, Inc. All rights reserved. 4 */ 5 6 / { 7 axs10x_mb@e0000000 { 8 compatible = "simple-bus"; 9 #address-cells = <1>; 10 #size-cells = <1>; 11 ranges = <0x00000000 0xe0000000 0x10000000>; 12 u-boot,dm-pre-reloc; 13 14 clocks { 15 compatible = "simple-bus"; 16 u-boot,dm-pre-reloc; 17 18 apbclk: apbclk { 19 compatible = "fixed-clock"; 20 clock-frequency = <50000000>; 21 #clock-cells = <0>; 22 }; 23 24 uartclk: uartclk { 25 compatible = "fixed-clock"; 26 clock-frequency = <33333333>; 27 #clock-cells = <0>; 28 u-boot,dm-pre-reloc; 29 }; 30 }; 31 32 ethernet@18000 { 33 compatible = "altr,socfpga-stmmac"; 34 reg = < 0x18000 0x2000 >; 35 phy-mode = "gmii"; 36 snps,pbl = < 32 >; 37 clocks = <&apbclk>; 38 clock-names = "stmmaceth"; 39 max-speed = <100>; 40 }; 41 42 ehci@0x40000 { 43 compatible = "generic-ehci"; 44 reg = < 0x40000 0x100 >; 45 }; 46 47 ohci@0x60000 { 48 compatible = "generic-ohci"; 49 reg = < 0x60000 0x100 >; 50 }; 51 52 uart0: serial0@22000 { 53 compatible = "snps,dw-apb-uart"; 54 reg = <0x22000 0x100>; 55 clocks = <&uartclk>; 56 reg-shift = <2>; 57 reg-io-width = <4>; 58 }; 59 }; 60 }; 61