xref: /openbmc/u-boot/arch/arc/cpu/arcv2/ivt.S (revision 1d2c0506)
1/*
2 * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7.section .ivt, "a",@progbits
8.align 4
9	/* Critical system events */
10.word	_start			/* 0x00 - Reset */
11.word	memory_error		/* 0x01 - Memory Error */
12.word	instruction_error	/* 0x02 - Instruction Error */
13
14	/* Exceptions */
15.word	EV_MachineCheck		/* 0x03 - Fatal Machine check */
16.word	EV_TLBMissI		/* 0x04 - Intruction TLB miss */
17.word	EV_TLBMissD		/* 0x05 - Data TLB miss */
18.word	EV_TLBProtV		/* 0x06 - Protection Violation or Misaligned Access */
19.word	EV_PrivilegeV		/* 0x07 - Privilege Violation */
20.word	EV_SWI			/* 0x08 - Software Interrupt */
21.word	EV_Trap			/* 0x09 - Trap */
22.word	EV_Extension		/* 0x0A - Extension Intruction Exception */
23.word	EV_DivZero		/* 0x0B - Division by Zero */
24.word	EV_DCError		/* 0x0C - Data cache consistency error */
25.word	EV_Maligned		/* 0x0D - Misaligned data access */
26.word	0			/* 0x0E - Unused */
27.word	0			/* 0x0F - Unused */
28
29	/* Device interrupts */
30.rept	240
31.word	interrupt_handler	/* 0x10 - 0xFF */
32.endr
33