1 /* 2 // Copyright (c) 2018 Intel Corporation 3 // 4 // Licensed under the Apache License, Version 2.0 (the "License"); 5 // you may not use this file except in compliance with the License. 6 // You may obtain a copy of the License at 7 // 8 // http://www.apache.org/licenses/LICENSE-2.0 9 // 10 // Unless required by applicable law or agreed to in writing, software 11 // distributed under the License is distributed on an "AS IS" BASIS, 12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 // See the License for the specific language governing permissions and 14 // limitations under the License. 15 */ 16 17 #pragma once 18 #include "smbios_mdrv2.hpp" 19 20 #include <xyz/openbmc_project/Association/Definitions/server.hpp> 21 #include <xyz/openbmc_project/Inventory/Connector/Slot/server.hpp> 22 #include <xyz/openbmc_project/Inventory/Decorator/Asset/server.hpp> 23 #include <xyz/openbmc_project/Inventory/Decorator/LocationCode/server.hpp> 24 #include <xyz/openbmc_project/Inventory/Decorator/Revision/server.hpp> 25 #include <xyz/openbmc_project/Inventory/Item/Cpu/server.hpp> 26 #include <xyz/openbmc_project/Inventory/Item/server.hpp> 27 28 namespace phosphor 29 { 30 31 namespace smbios 32 { 33 34 using rev = 35 sdbusplus::server::xyz::openbmc_project::inventory::decorator::Revision; 36 using asset = 37 sdbusplus::server::xyz::openbmc_project::inventory::decorator::Asset; 38 using location = 39 sdbusplus::server::xyz::openbmc_project::inventory::decorator::LocationCode; 40 using connector = 41 sdbusplus::server::xyz::openbmc_project::inventory::connector::Slot; 42 using processor = sdbusplus::server::xyz::openbmc_project::inventory::item::Cpu; 43 using Item = sdbusplus::server::xyz::openbmc_project::inventory::Item; 44 using association = 45 sdbusplus::server::xyz::openbmc_project::association::Definitions; 46 47 // Definition follow smbios spec DSP0134 3.0.0 48 static const std::map<uint8_t, const char*> familyTable = { 49 {0x1, "Other"}, 50 {0x2, "Unknown"}, 51 {0x10, "Pentium II Xeon processor"}, 52 {0x2b, "Intel Atom processor"}, 53 {0x2c, "Intel Core M processor"}, 54 {0x2d, "Intel Core m3 processor"}, 55 {0x2e, "Intel Core m5 processor"}, 56 {0x2f, "Intel Core m7 processor"}, 57 {0xa1, "Quad-Core Intel Xeon processor 3200 Series"}, 58 {0xa2, "Dual-Core Intel Xeon processor 3000 Series"}, 59 {0xa3, "Quad-Core Intel Xeon processor 5300 Series"}, 60 {0xa4, "Dual-Core Intel Xeon processor 5100 Series"}, 61 {0xa5, "Dual-Core Intel Xeon processor 5000 Series"}, 62 {0xa6, "Dual-Core Intel Xeon processor LV"}, 63 {0xa7, "Dual-Core Intel Xeon processor ULV"}, 64 {0xa8, "Dual-Core Intel Xeon processor 7100 Series"}, 65 {0xa9, "Quad-Core Intel Xeon processor 5400 Series"}, 66 {0xaa, "Quad-Core Intel Xeon processor"}, 67 {0xab, "Dual-Core Intel Xeon processor 5200 Series"}, 68 {0xac, "Dual-Core Intel Xeon processor 7200 Series"}, 69 {0xad, "Quad-Core Intel Xeon processor 7300 Series"}, 70 {0xae, "Quad-Core Intel Xeon processor 7400 Series"}, 71 {0xaf, "Multi-Core Intel Xeon processor 7400 Series"}, 72 {0xb0, "Pentium III Xeon processor"}, 73 {0xb3, "Intel Xeon processor"}, 74 {0xb5, "Intel Xeon processor MP"}, 75 {0xd6, "Multi-Core Intel Xeon processor"}, 76 {0xd7, "Dual-Core Intel Xeon processor 3xxx Series"}, 77 {0xd8, "Quad-Core Intel Xeon processor 3xxx Series"}, 78 {0xd9, "VIA Nano Processor Family"}, 79 {0xda, "Dual-Core Intel Xeon processor 5xxx Series"}, 80 {0xdb, "Quad-Core Intel Xeon processor 5xxx Series"}, 81 {0xdd, "Dual-Core Intel Xeon processor 7xxx Series"}, 82 {0xde, "Quad-Core Intel Xeon processor 7xxx Series"}, 83 {0xdf, "Multi-Core Intel Xeon processor 7xxx Series"}, 84 {0xe0, "Multi-Core Intel Xeon processor 3400 Series"}, 85 {0xfe, "Processor Family 2 Indicator"} 86 87 }; 88 89 // Definition follow smbios spec DSP0134 3.1.1 90 static const std::map<uint16_t, const char*> family2Table = { 91 {0x100, "ARMv7"}, {0x101, "ARMv8"}, {0x118, "ARM"}, {0x119, "StrongARM"} 92 93 }; 94 95 // Definition follow smbios spec DSP0134 3.0.0 96 static const std::array<std::optional<processor::Capability>, 16> 97 characteristicsTable{std::nullopt, 98 std::nullopt, 99 processor::Capability::Capable64bit, 100 processor::Capability::MultiCore, 101 processor::Capability::HardwareThread, 102 processor::Capability::ExecuteProtection, 103 processor::Capability::EnhancedVirtualization, 104 processor::Capability::PowerPerformanceControl, 105 std::nullopt, 106 std::nullopt, 107 std::nullopt, 108 std::nullopt, 109 std::nullopt, 110 std::nullopt, 111 std::nullopt, 112 std::nullopt}; 113 114 class Cpu : 115 sdbusplus::server::object_t<processor, asset, location, connector, rev, 116 Item, association> 117 { 118 public: 119 Cpu() = delete; 120 Cpu(const Cpu&) = delete; 121 Cpu& operator=(const Cpu&) = delete; 122 Cpu(Cpu&&) = delete; 123 Cpu& operator=(Cpu&&) = delete; 124 ~Cpu() = default; 125 126 Cpu(sdbusplus::bus_t& bus, const std::string& objPath, const uint8_t& cpuId, 127 uint8_t* smbiosTableStorage, const std::string& motherboard) : 128 sdbusplus::server::object_t<processor, asset, location, connector, rev, 129 Item, association>(bus, objPath.c_str()), 130 cpuNum(cpuId), storage(smbiosTableStorage), motherboardPath(motherboard) 131 { 132 infoUpdate(smbiosTableStorage, motherboard); 133 } 134 135 void infoUpdate(uint8_t* smbiosTableStorage, 136 const std::string& motherboard); 137 138 private: 139 uint8_t cpuNum; 140 141 uint8_t* storage; 142 143 std::string motherboardPath; 144 145 struct ProcessorInfo 146 { 147 uint8_t type; 148 uint8_t length; 149 uint16_t handle; 150 uint8_t socketDesignation; 151 uint8_t processorType; 152 uint8_t family; 153 uint8_t manufacturer; 154 uint64_t id; 155 uint8_t version; 156 uint8_t voltage; 157 uint16_t exClock; 158 uint16_t maxSpeed; 159 uint16_t currSpeed; 160 uint8_t status; 161 uint8_t upgrade; 162 uint16_t l1Handle; 163 uint16_t l2Handle; 164 uint16_t l3Handle; 165 uint8_t serialNum; 166 uint8_t assetTag; 167 uint8_t partNum; 168 uint8_t coreCount; 169 uint8_t coreEnable; 170 uint8_t threadCount; 171 uint16_t characteristics; 172 uint16_t family2; 173 uint16_t coreCount2; 174 uint16_t coreEnable2; 175 uint16_t threadCount2; 176 } __attribute__((packed)); 177 178 void socket(const uint8_t positionNum, const uint8_t structLen, 179 uint8_t* dataIn); 180 void family(const uint8_t family, const uint16_t family2); 181 void manufacturer(const uint8_t positionNum, const uint8_t structLen, 182 uint8_t* dataIn); 183 void serialNumber(const uint8_t positionNum, const uint8_t structLen, 184 uint8_t* dataIn); 185 void partNumber(const uint8_t positionNum, const uint8_t structLen, 186 uint8_t* dataIn); 187 void version(const uint8_t positionNum, const uint8_t structLen, 188 uint8_t* dataIn); 189 void characteristics(const uint16_t value); 190 }; 191 192 } // namespace smbios 193 194 } // namespace phosphor 195