xref: /openbmc/smbios-mdr/include/cpu.hpp (revision 306df484)
1 /*
2 // Copyright (c) 2018 Intel Corporation
3 //
4 // Licensed under the Apache License, Version 2.0 (the "License");
5 // you may not use this file except in compliance with the License.
6 // You may obtain a copy of the License at
7 //
8 //      http://www.apache.org/licenses/LICENSE-2.0
9 //
10 // Unless required by applicable law or agreed to in writing, software
11 // distributed under the License is distributed on an "AS IS" BASIS,
12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 // See the License for the specific language governing permissions and
14 // limitations under the License.
15 */
16 
17 #pragma once
18 #include "smbios_mdrv2.hpp"
19 
20 #include <xyz/openbmc_project/Association/Definitions/server.hpp>
21 #include <xyz/openbmc_project/Inventory/Connector/Slot/server.hpp>
22 #include <xyz/openbmc_project/Inventory/Decorator/Asset/server.hpp>
23 #include <xyz/openbmc_project/Inventory/Decorator/LocationCode/server.hpp>
24 #include <xyz/openbmc_project/Inventory/Decorator/Revision/server.hpp>
25 #include <xyz/openbmc_project/Inventory/Item/Cpu/server.hpp>
26 #include <xyz/openbmc_project/Inventory/Item/server.hpp>
27 
28 namespace phosphor
29 {
30 
31 namespace smbios
32 {
33 
34 using rev =
35     sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::Revision;
36 using asset =
37     sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::Asset;
38 using location =
39     sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::LocationCode;
40 using connector =
41     sdbusplus::xyz::openbmc_project::Inventory::Connector::server::Slot;
42 using processor = sdbusplus::xyz::openbmc_project::Inventory::Item::server::Cpu;
43 using Item = sdbusplus::xyz::openbmc_project::Inventory::server::Item;
44 using association =
45     sdbusplus::xyz::openbmc_project::Association::server::Definitions;
46 
47 // Definition follow smbios spec DSP0134 3.0.0
48 static const std::map<uint8_t, const char*> familyTable = {
49     {0x1, "Other"},
50     {0x2, "Unknown"},
51     {0x10, "Pentium II Xeon processor"},
52     {0xa1, "Quad-Core Intel Xeon processor 3200 Series"},
53     {0xa2, "Dual-Core Intel Xeon processor 3000 Series"},
54     {0xa3, "Quad-Core Intel Xeon processor 5300 Series"},
55     {0xa4, "Dual-Core Intel Xeon processor 5100 Series"},
56     {0xa5, "Dual-Core Intel Xeon processor 5000 Series"},
57     {0xa6, "Dual-Core Intel Xeon processor LV"},
58     {0xa7, "Dual-Core Intel Xeon processor ULV"},
59     {0xa8, "Dual-Core Intel Xeon processor 7100 Series"},
60     {0xa9, "Quad-Core Intel Xeon processor 5400 Series"},
61     {0xaa, "Quad-Core Intel Xeon processor"},
62     {0xab, "Dual-Core Intel Xeon processor 5200 Series"},
63     {0xac, "Dual-Core Intel Xeon processor 7200 Series"},
64     {0xad, "Quad-Core Intel Xeon processor 7300 Series"},
65     {0xae, "Quad-Core Intel Xeon processor 7400 Series"},
66     {0xaf, "Multi-Core Intel Xeon processor 7400 Series"},
67     {0xb0, "Pentium III Xeon processor"},
68     {0xb3, "Intel Xeon processor"},
69     {0xb5, "Intel Xeon processor MP"},
70     {0xd6, "Multi-Core Intel Xeon processor"},
71     {0xd7, "Dual-Core Intel Xeon processor 3xxx Series"},
72     {0xd8, "Quad-Core Intel Xeon processor 3xxx Series"},
73     {0xd9, "VIA Nano Processor Family"},
74     {0xda, "Dual-Core Intel Xeon processor 5xxx Series"},
75     {0xdb, "Quad-Core Intel Xeon processor 5xxx Series"},
76     {0xdd, "Dual-Core Intel Xeon processor 7xxx Series"},
77     {0xde, "Quad-Core Intel Xeon processor 7xxx Series"},
78     {0xdf, "Multi-Core Intel Xeon processor 7xxx Series"},
79     {0xe0, "Multi-Core Intel Xeon processor 3400 Series"},
80     {0xfe, "Processor Family 2 Indicator"}
81 
82 };
83 
84 // Definition follow smbios spec DSP0134 3.1.1
85 static const std::map<uint16_t, const char*> family2Table = {
86     {0x100, "ARMv7"}, {0x101, "ARMv8"}, {0x118, "ARM"}, {0x119, "StrongARM"}
87 
88 };
89 
90 // Definition follow smbios spec DSP0134 3.0.0
91 static const std::array<std::optional<processor::Capability>, 16>
92     characteristicsTable{std::nullopt,
93                          std::nullopt,
94                          processor::Capability::Capable64bit,
95                          processor::Capability::MultiCore,
96                          processor::Capability::HardwareThread,
97                          processor::Capability::ExecuteProtection,
98                          processor::Capability::EnhancedVirtualization,
99                          processor::Capability::PowerPerformanceControl,
100                          std::nullopt,
101                          std::nullopt,
102                          std::nullopt,
103                          std::nullopt,
104                          std::nullopt,
105                          std::nullopt,
106                          std::nullopt,
107                          std::nullopt};
108 
109 class Cpu :
110     sdbusplus::server::object_t<processor, asset, location, connector, rev,
111                                 Item, association>
112 {
113   public:
114     Cpu() = delete;
115     Cpu(const Cpu&) = delete;
116     Cpu& operator=(const Cpu&) = delete;
117     Cpu(Cpu&&) = delete;
118     Cpu& operator=(Cpu&&) = delete;
119     ~Cpu() = default;
120 
121     Cpu(sdbusplus::bus_t& bus, const std::string& objPath, const uint8_t& cpuId,
122         uint8_t* smbiosTableStorage, const std::string& motherboard) :
123         sdbusplus::server::object_t<processor, asset, location, connector, rev,
124                                     Item, association>(bus, objPath.c_str()),
125         cpuNum(cpuId), storage(smbiosTableStorage), motherboardPath(motherboard)
126     {
127         infoUpdate();
128     }
129 
130     void infoUpdate(void);
131 
132   private:
133     uint8_t cpuNum;
134 
135     uint8_t* storage;
136 
137     std::string motherboardPath;
138 
139     struct ProcessorInfo
140     {
141         uint8_t type;
142         uint8_t length;
143         uint16_t handle;
144         uint8_t socketDesignation;
145         uint8_t processorType;
146         uint8_t family;
147         uint8_t manufacturer;
148         uint64_t id;
149         uint8_t version;
150         uint8_t voltage;
151         uint16_t exClock;
152         uint16_t maxSpeed;
153         uint16_t currSpeed;
154         uint8_t status;
155         uint8_t upgrade;
156         uint16_t l1Handle;
157         uint16_t l2Handle;
158         uint16_t l3Handle;
159         uint8_t serialNum;
160         uint8_t assetTag;
161         uint8_t partNum;
162         uint8_t coreCount;
163         uint8_t coreEnable;
164         uint8_t threadCount;
165         uint16_t characteristics;
166         uint16_t family2;
167         uint16_t coreCount2;
168         uint16_t coreEnable2;
169         uint16_t threadCount2;
170     } __attribute__((packed));
171 
172     void socket(const uint8_t positionNum, const uint8_t structLen,
173                 uint8_t* dataIn);
174     void family(const uint8_t family, const uint16_t family2);
175     void manufacturer(const uint8_t positionNum, const uint8_t structLen,
176                       uint8_t* dataIn);
177     void serialNumber(const uint8_t positionNum, const uint8_t structLen,
178                       uint8_t* dataIn);
179     void partNumber(const uint8_t positionNum, const uint8_t structLen,
180                     uint8_t* dataIn);
181     void version(const uint8_t positionNum, const uint8_t structLen,
182                  uint8_t* dataIn);
183     void characteristics(const uint16_t value);
184 };
185 
186 } // namespace smbios
187 
188 } // namespace phosphor
189