1# Trace events for debugging and performance instrumentation 2# 3# This file is processed by the tracetool script during the build. 4# 5# To add a new trace event: 6# 7# 1. Choose a name for the trace event. Declare its arguments and format 8# string. 9# 10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> 11# trace_multiwrite_cb(). The source file must #include "trace.h". 12# 13# Format of a trace event: 14# 15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" 16# 17# Example: qemu_malloc(size_t size) "size %zu" 18# 19# The "disable" keyword will build without the trace event. 20# In case of 'simple' trace backend, it will allow the trace event to be 21# compiled, but this would be turned off by default. It can be toggled on via 22# the monitor. 23# 24# The <name> must be a valid as a C function name. 25# 26# Types should be standard C types. Use void * for pointers because the trace 27# system may not have the necessary headers included. 28# 29# The <format-string> should be a sprintf()-compatible format string. 30 31# qemu-malloc.c 32disable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p" 33disable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" 34disable qemu_free(void *ptr) "ptr %p" 35 36# osdep.c 37disable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" 38disable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" 39disable qemu_vfree(void *ptr) "ptr %p" 40 41# hw/virtio.c 42disable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" 43disable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" 44disable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" 45disable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" 46disable virtio_irq(void *vq) "vq %p" 47disable virtio_notify(void *vdev, void *vq) "vdev %p vq %p" 48 49# block.c 50disable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" 51disable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" 52disable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p" 53disable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d" 54disable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 55disable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 56 57# hw/virtio-blk.c 58disable virtio_blk_req_complete(void *req, int status) "req %p status %d" 59disable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" 60disable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" 61 62# posix-aio-compat.c 63disable paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" 64 65# ioport.c 66disable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" 67disable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" 68 69# balloon.c 70# Since requests are raised via monitor, not many tracepoints are needed. 71disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" 72 73# hw/apic.c 74disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" 75disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d polarity %d trigger_mode %d" 76disable cpu_set_apic_base(uint64_t val) "%016"PRIx64"" 77disable cpu_get_apic_base(uint64_t val) "%016"PRIx64"" 78disable apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 79disable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 80# coalescing 81disable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" 82disable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" 83disable apic_set_irq(int apic_irq_delivered) "coalescing %d" 84 85# hw/cs4231.c 86disable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" 87disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" 88disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" 89disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" 90 91# hw/eccmemctl.c 92disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" 93disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" 94disable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" 95disable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" 96disable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" 97disable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" 98disable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" 99disable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" 100disable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" 101disable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" 102disable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" 103disable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" 104disable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" 105disable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" 106disable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" 107disable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" 108disable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" 109disable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" 110 111# hw/lance.c 112disable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" 113disable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" 114 115# hw/slavio_intctl.c 116disable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" 117disable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" 118disable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" 119disable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" 120disable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" 121disable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" 122disable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" 123disable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" 124disable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" 125disable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" 126disable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" 127disable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" 128 129# hw/slavio_misc.c 130disable slavio_misc_update_irq_raise(void) "Raise IRQ" 131disable slavio_misc_update_irq_lower(void) "Lower IRQ" 132disable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" 133disable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" 134disable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" 135disable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" 136disable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" 137disable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" 138disable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" 139disable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" 140disable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" 141disable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" 142disable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" 143disable apc_mem_writeb(uint32_t val) "Write power management %02x" 144disable apc_mem_readb(uint32_t ret) "Read power management %02x" 145disable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" 146disable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" 147disable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" 148disable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" 149 150# hw/slavio_timer.c 151disable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" 152disable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" 153disable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64"" 154disable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" 155disable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" 156disable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64"" 157disable slavio_timer_mem_writel_counter_invalid(void) "not user timer" 158disable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" 159disable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" 160disable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" 161disable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" 162disable slavio_timer_mem_writel_mode_invalid(void) "not system timer" 163disable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64"" 164 165# hw/sparc32_dma.c 166disable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64"" 167disable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64"" 168disable sparc32_dma_set_irq_raise(void) "Raise IRQ" 169disable sparc32_dma_set_irq_lower(void) "Lower IRQ" 170disable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" 171disable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" 172disable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" 173disable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" 174disable sparc32_dma_enable_raise(void) "Raise DMA enable" 175disable sparc32_dma_enable_lower(void) "Lower DMA enable" 176 177# hw/sun4m.c 178disable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" 179disable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 180disable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" 181disable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" 182 183# hw/sun4m_iommu.c 184disable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" 185disable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" 186disable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64"" 187disable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" 188disable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" 189disable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" 190disable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" 191disable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" 192 193# vl.c 194disable vm_state_notify(int running, int reason) "running %d reason %d" 195