1# Trace events for debugging and performance instrumentation 2# 3# This file is processed by the tracetool script during the build. 4# 5# To add a new trace event: 6# 7# 1. Choose a name for the trace event. Declare its arguments and format 8# string. 9# 10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> 11# trace_multiwrite_cb(). The source file must #include "trace.h". 12# 13# Format of a trace event: 14# 15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" 16# 17# Example: g_malloc(size_t size) "size %zu" 18# 19# The "disable" keyword will build without the trace event. 20# 21# The <name> must be a valid as a C function name. 22# 23# Types should be standard C types. Use void * for pointers because the trace 24# system may not have the necessary headers included. 25# 26# The <format-string> should be a sprintf()-compatible format string. 27 28# qemu-malloc.c 29g_malloc(size_t size, void *ptr) "size %zu ptr %p" 30g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" 31g_free(void *ptr) "ptr %p" 32 33# osdep.c 34qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" 35qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" 36qemu_vfree(void *ptr) "ptr %p" 37 38# hw/virtio.c 39virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" 40virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" 41virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" 42virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" 43virtio_irq(void *vq) "vq %p" 44virtio_notify(void *vdev, void *vq) "vdev %p vq %p" 45virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u" 46 47# hw/virtio-serial-bus.c 48virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" 49virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" 50virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" 51virtio_serial_handle_control_message_port(unsigned int port) "port %u" 52 53# hw/virtio-console.c 54virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" 55virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" 56virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" 57 58# block.c 59bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\"" 60multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" 61bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" 62bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 63bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" 64bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 65bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 66bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d" 67bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" 68bdrv_co_copy_on_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" 69bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" 70bdrv_co_write_zeroes(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" 71bdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p" 72bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d" 73 74# block/stream.c 75stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d" 76stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p" 77commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d" 78commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p" 79 80# block/mirror.c 81mirror_start(void *bs, void *s, void *co, void *opaque) "bs %p s %p co %p opaque %p" 82mirror_before_flush(void *s) "s %p" 83mirror_before_drain(void *s, int64_t cnt) "s %p dirty count %"PRId64 84mirror_before_sleep(void *s, int64_t cnt, int synced) "s %p dirty count %"PRId64" synced %d" 85mirror_one_iteration(void *s, int64_t sector_num, int nb_sectors) "s %p sector_num %"PRId64" nb_sectors %d" 86 87# blockdev.c 88qmp_block_job_cancel(void *job) "job %p" 89qmp_block_job_pause(void *job) "job %p" 90qmp_block_job_resume(void *job) "job %p" 91qmp_block_job_complete(void *job) "job %p" 92block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d" 93qmp_block_stream(void *bs, void *job) "bs %p job %p" 94 95# hw/virtio-blk.c 96virtio_blk_req_complete(void *req, int status) "req %p status %d" 97virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" 98virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" 99virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" 100 101# hw/dataplane/virtio-blk.c 102virtio_blk_data_plane_start(void *s) "dataplane %p" 103virtio_blk_data_plane_stop(void *s) "dataplane %p" 104virtio_blk_data_plane_process_request(void *s, unsigned int out_num, unsigned int in_num, unsigned int head) "dataplane %p out_num %u in_num %u head %u" 105virtio_blk_data_plane_complete_request(void *s, unsigned int head, int ret) "dataplane %p head %u ret %d" 106 107# hw/dataplane/vring.c 108vring_setup(uint64_t physical, void *desc, void *avail, void *used) "vring physical %#"PRIx64" desc %p avail %p used %p" 109 110# thread-pool.c 111thread_pool_submit(void *req, void *opaque) "req %p opaque %p" 112thread_pool_complete(void *req, void *opaque, int ret) "req %p opaque %p ret %d" 113thread_pool_cancel(void *req, void *opaque) "req %p opaque %p" 114 115# posix-aio-compat.c 116paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" 117paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" 118paio_cancel(void *acb, void *opaque) "acb %p opaque %p" 119 120# ioport.c 121cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" 122cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" 123 124# balloon.c 125# Since requests are raised via monitor, not many tracepoints are needed. 126balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" 127 128# hw/apic.c 129apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" 130apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" 131cpu_set_apic_base(uint64_t val) "%016"PRIx64 132cpu_get_apic_base(uint64_t val) "%016"PRIx64 133apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 134apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 135# coalescing 136apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d" 137apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" 138apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" 139 140# hw/cs4231.c 141cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" 142cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" 143cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" 144cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" 145 146# hw/ds1225y.c 147nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" 148nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" 149 150# hw/eccmemctl.c 151ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" 152ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" 153ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" 154ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" 155ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" 156ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" 157ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" 158ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" 159ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" 160ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" 161ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" 162ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" 163ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" 164ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" 165ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" 166ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" 167ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" 168ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" 169 170# hw/fw_cfg.c 171fw_cfg_write(void *s, uint8_t value) "%p %d" 172fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d" 173fw_cfg_read(void *s, uint8_t ret) "%p = %d" 174fw_cfg_add_file_dupe(void *s, char *name) "%p %s" 175fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)" 176 177# hw/hd-geometry.c 178hd_geometry_lchs_guess(void *bs, int cyls, int heads, int secs) "bs %p LCHS %d %d %d" 179hd_geometry_guess(void *bs, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "bs %p CHS %u %u %u trans %d" 180 181# hw/jazz-led.c 182jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x" 183jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x" 184 185# hw/lance.c 186lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" 187lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" 188 189# hw/slavio_intctl.c 190slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" 191slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" 192slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" 193slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" 194slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" 195slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" 196slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" 197slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" 198slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" 199slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" 200slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" 201slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" 202 203# hw/slavio_misc.c 204slavio_misc_update_irq_raise(void) "Raise IRQ" 205slavio_misc_update_irq_lower(void) "Lower IRQ" 206slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" 207slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" 208slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" 209slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" 210slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" 211slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" 212slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" 213slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" 214slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" 215slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" 216slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" 217apc_mem_writeb(uint32_t val) "Write power management %02x" 218apc_mem_readb(uint32_t ret) "Read power management %02x" 219slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" 220slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" 221slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" 222slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" 223 224# hw/slavio_timer.c 225slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" 226slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" 227slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64 228slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" 229slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" 230slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64 231slavio_timer_mem_writel_counter_invalid(void) "not user timer" 232slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" 233slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" 234slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" 235slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" 236slavio_timer_mem_writel_mode_invalid(void) "not system timer" 237slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64 238 239# hw/sparc32_dma.c 240ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64 241ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64 242sparc32_dma_set_irq_raise(void) "Raise IRQ" 243sparc32_dma_set_irq_lower(void) "Lower IRQ" 244espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" 245espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" 246sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" 247sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" 248sparc32_dma_enable_raise(void) "Raise DMA enable" 249sparc32_dma_enable_lower(void) "Lower DMA enable" 250 251# hw/sun4m.c 252sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" 253sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 254sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" 255sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" 256 257# hw/sun4m_iommu.c 258sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" 259sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" 260sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64 261sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" 262sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" 263sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" 264sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" 265sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64 266 267# hw/usb/core.c 268usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s" 269usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s" 270 271# hw/usb/bus.c 272usb_port_claim(int bus, const char *port) "bus %d, port %s" 273usb_port_attach(int bus, const char *port) "bus %d, port %s" 274usb_port_detach(int bus, const char *port) "bus %d, port %s" 275usb_port_release(int bus, const char *port) "bus %d, port %s" 276 277# hw/usb/hcd-ehci.c 278usb_ehci_reset(void) "=== RESET ===" 279usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" 280usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x" 281usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)" 282usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio %04x [port %d] = %x" 283usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio %04x [port %d] = %x" 284usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio %04x [port %d] = %x (old: %x)" 285usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" 286usb_ehci_state(const char *schedule, const char *state) "%s schedule %s" 287usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x" 288usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" 289usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d" 290usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x" 291usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" 292usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" 293usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" 294usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d" 295usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s" 296usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s" 297usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" 298usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d" 299usb_ehci_queue_action(void *q, const char *action) "q %p: %s" 300usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s" 301usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x" 302usb_ehci_guest_bug(const char *reason) "%s" 303usb_ehci_doorbell_ring(void) "" 304usb_ehci_doorbell_ack(void) "" 305usb_ehci_dma_error(void) "" 306 307# hw/usb/hcd-uhci.c 308usb_uhci_reset(void) "=== RESET ===" 309usb_uhci_schedule_start(void) "" 310usb_uhci_schedule_stop(void) "" 311usb_uhci_frame_start(uint32_t num) "nr %d" 312usb_uhci_frame_stop_bandwidth(void) "" 313usb_uhci_frame_loop_stop_idle(void) "" 314usb_uhci_frame_loop_continue(void) "" 315usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x" 316usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x" 317usb_uhci_queue_add(uint32_t token) "token 0x%x" 318usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s" 319usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 320usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 321usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 322usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d" 323usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 324usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 325usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 326usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 327usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 328usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 329usb_uhci_qh_load(uint32_t qh) "qh 0x%x" 330usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x" 331usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x" 332usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" 333usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" 334usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" 335 336# hw/usb/hcd-xhci.c 337usb_xhci_reset(void) "=== RESET ===" 338usb_xhci_run(void) "" 339usb_xhci_stop(void) "" 340usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" 341usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" 342usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x" 343usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" 344usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" 345usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" 346usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x" 347usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" 348usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" 349usb_xhci_irq_intx(uint32_t level) "level %d" 350usb_xhci_irq_msi(uint32_t nr) "nr %d" 351usb_xhci_irq_msix(uint32_t nr) "nr %d" 352usb_xhci_irq_msix_use(uint32_t nr) "nr %d" 353usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d" 354usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x" 355usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x" 356usb_xhci_port_reset(uint32_t port) "port %d" 357usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d" 358usb_xhci_slot_enable(uint32_t slotid) "slotid %d" 359usb_xhci_slot_disable(uint32_t slotid) "slotid %d" 360usb_xhci_slot_address(uint32_t slotid) "slotid %d" 361usb_xhci_slot_configure(uint32_t slotid) "slotid %d" 362usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d" 363usb_xhci_slot_reset(uint32_t slotid) "slotid %d" 364usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 365usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 366usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint64_t param) "slotid %d, epid %d, ptr %016" PRIx64 367usb_xhci_ep_kick(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 368usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 369usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 370usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid) "%p: slotid %d, epid %d" 371usb_xhci_xfer_async(void *xfer) "%p" 372usb_xhci_xfer_nak(void *xfer) "%p" 373usb_xhci_xfer_retry(void *xfer) "%p" 374usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d" 375usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d" 376 377# hw/usb/desc.c 378usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" 379usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" 380usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 381usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 382usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" 383usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d" 384usb_set_addr(int addr) "dev %d" 385usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" 386usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d" 387usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 388usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 389 390# hw/usb/dev-hub.c 391usb_hub_reset(int addr) "dev %d" 392usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d" 393usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x" 394usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s" 395usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s" 396usb_hub_attach(int addr, int nr) "dev %d, port %d" 397usb_hub_detach(int addr, int nr) "dev %d, port %d" 398 399# hw/usb/dev-uas.c 400usb_uas_reset(int addr) "dev %d" 401usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x" 402usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x" 403usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x" 404usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" 405usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" 406usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d" 407usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d" 408usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d" 409usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x" 410usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d" 411usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x" 412 413# hw/usb/host-linux.c 414usb_host_open_started(int bus, int addr) "dev %d:%d" 415usb_host_open_success(int bus, int addr) "dev %d:%d" 416usb_host_open_failure(int bus, int addr) "dev %d:%d" 417usb_host_disconnect(int bus, int addr) "dev %d:%d" 418usb_host_close(int bus, int addr) "dev %d:%d" 419usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d" 420usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d" 421usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d" 422usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d" 423usb_host_release_interfaces(int bus, int addr) "dev %d:%d" 424usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d" 425usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d" 426usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d" 427usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d" 428usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p" 429usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d" 430usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d" 431usb_host_urb_canceled(int bus, int addr, void *aurb) "dev %d:%d, aurb %p" 432usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" 433usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" 434usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d" 435usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d" 436usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d" 437usb_host_iso_many_urbs(int bus, int addr, int count) "dev %d:%d, count %d" 438usb_host_reset(int bus, int addr) "dev %d:%d" 439usb_host_auto_scan_enabled(void) 440usb_host_auto_scan_disabled(void) 441usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d" 442usb_host_parse_device(int bus, int addr, int vendor, int product) "dev %d:%d, id %04x:%04x" 443usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d" 444usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d" 445usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d" 446usb_host_parse_unknown(int bus, int addr, int len, int type) "dev %d:%d, len %d, type %d" 447usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s" 448 449# hw/scsi-bus.c 450scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" 451scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d" 452scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" 453scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" 454scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" 455scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" 456scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" 457scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64 458scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" 459scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" 460scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key %#02x asc %#02x ascq %#02x" 461scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" 462scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x" 463scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" 464scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" 465 466# vl.c 467vm_state_notify(int running, int reason) "running %d reason %d" 468 469# block/qcow2.c 470qcow2_writev_start_req(void *co, int64_t sector, int nb_sectors) "co %p sector %" PRIx64 " nb_sectors %d" 471qcow2_writev_done_req(void *co, int ret) "co %p ret %d" 472qcow2_writev_start_part(void *co) "co %p" 473qcow2_writev_done_part(void *co, int cur_nr_sectors) "co %p cur_nr_sectors %d" 474qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64 475 476qcow2_alloc_clusters_offset(void *co, uint64_t offset, int n_start, int n_end) "co %p offet %" PRIx64 " n_start %d n_end %d" 477qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " nb_clusters %d" 478qcow2_cluster_alloc_phys(void *co) "co %p" 479qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d" 480 481qcow2_l2_allocate(void *bs, int l1_index) "bs %p l1_index %d" 482qcow2_l2_allocate_get_empty(void *bs, int l1_index) "bs %p l1_index %d" 483qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d" 484qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d" 485qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d" 486 487qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d" 488qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d" 489qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d" 490qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d" 491qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d" 492qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d" 493 494# block/qed-l2-cache.c 495qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" 496qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" 497qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" 498 499# block/qed-table.c 500qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" 501qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" 502qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" 503qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" 504 505# block/qed.c 506qed_need_check_timer_cb(void *s) "s %p" 507qed_start_need_check_timer(void *s) "s %p" 508qed_cancel_need_check_timer(void *s) "s %p" 509qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" 510qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags %#x" 511qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64 512qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 513qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 514qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 515qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 516qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 517 518# hw/g364fb.c 519g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" 520g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" 521 522# hw/grlib_gptimer.c 523grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" 524grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" 525grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" 526grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" 527grlib_gptimer_hit(int id) "timer:%d HIT" 528grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" 529grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" 530 531# hw/grlib_irqmp.c 532grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x" 533grlib_irqmp_ack(int intno) "interrupt:%d" 534grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" 535grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 536grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" 537 538# hw/grlib_apbuart.c 539grlib_apbuart_event(int event) "event:%d" 540grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" 541grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64"" 542 543# hw/leon3.c 544leon3_set_irq(int intno) "Set CPU IRQ %d" 545leon3_reset_irq(int intno) "Reset CPU IRQ %d" 546 547# spice-qemu-char.c 548spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" 549spice_vmc_read(int bytes, int len) "spice read %d of requested %d" 550spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" 551spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" 552spice_vmc_event(int event) "spice vmc event %d" 553 554# hw/lm32_pic.c 555lm32_pic_raise_irq(void) "Raise CPU interrupt" 556lm32_pic_lower_irq(void) "Lower CPU interrupt" 557lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" 558lm32_pic_set_im(uint32_t im) "im 0x%08x" 559lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" 560lm32_pic_get_im(uint32_t im) "im 0x%08x" 561lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" 562 563# hw/lm32_juart.c 564lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" 565lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" 566lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" 567lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" 568 569# hw/lm32_timer.c 570lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 571lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 572lm32_timer_hit(void) "timer hit" 573lm32_timer_irq_state(int level) "irq state %d" 574 575# hw/lm32_uart.c 576lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 577lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 578lm32_uart_irq_state(int level) "irq state %d" 579 580# hw/lm32_sys.c 581lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 582 583# hw/megasas.c 584megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " " 585megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x" 586megasas_initq_map_failed(int frame) "scmd %d: failed to map queue" 587megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d" 588megasas_qf_found(unsigned int index, uint64_t pa) "found mapped frame %x pa %" PRIx64 "" 589megasas_qf_new(unsigned int index, void *cmd) "return new frame %x cmd %p" 590megasas_qf_failed(unsigned long pa) "all frames busy for frame %lx" 591megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int tail, int busy) "enqueue frame %x count %d context %" PRIx64 " tail %x busy %d" 592megasas_qf_update(unsigned int head, unsigned int busy) "update reply queue head %x busy %d" 593megasas_qf_dequeue(unsigned int index) "dequeue frame %x" 594megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu" 595megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " " 596megasas_qf_complete(uint64_t context, unsigned int tail, unsigned int offset, int busy, unsigned int doorbell) "context %" PRIx64 " tail %x offset %d busy %d doorbell %x" 597megasas_handle_frame(const char *cmd, uint64_t addr, uint64_t context, uint32_t count) "MFI cmd %s addr %" PRIx64 " context %" PRIx64 " count %d" 598megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy" 599megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: Unhandled MFI cmd %x" 600megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu" 601megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x target not present" 602megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d" 603megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" 604megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" 605megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" 606megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" 607megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x req allocation failed" 608megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data" 609megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data" 610megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred" 611megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: finished with status %x, len %u/%u" 612megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: command completed, status %x, residual %d" 613megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu" 614megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present" 615megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)" 616megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)" 617megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes completed" 618megasas_io_read(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu" 619megasas_io_write(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu" 620megasas_io_continue(int cmd, int bytes) "scmd %d: %d bytes left" 621megasas_iovec_map_failed(int cmd, int index, unsigned long iov_size) "scmd %d: iovec %d size %lu" 622megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d" 623megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d" 624megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u" 625megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d" 626megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d" 627megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x" 628megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes" 629megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s alloc failed" 630megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d" 631megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: DCMD finish internal cmd %x lun %d" 632megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: Invalid internal DCMD %x" 633megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d" 634megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count" 635megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: invalid DCMD sge count %d" 636megasas_dcmd_map_failed(int cmd) "scmd %d: Failed to map DCMD buffer" 637megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: invalid xfer len %ld, max %ld" 638megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d" 639megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: DCMD dummy xfer len %ld" 640megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx" 641megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d" 642megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs" 643megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: DCMD LD get info for dev %d" 644megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: DCMD PD get info for dev %d" 645megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: DCMD PD list query flags %x" 646megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld" 647megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: aborting frame %x" 648megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64 "" 649megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x" 650megasas_reset(void) "Reset" 651megasas_init(int sges, int cmds, const char *intr, const char *mode) "Using %d sges, %d cmds, %s, %s mode" 652megasas_msix_raise(int vector) "vector %d" 653megasas_irq_lower(void) "INTx" 654megasas_irq_raise(void) "INTx" 655megasas_intr_enabled(void) "Interrupts enabled" 656megasas_intr_disabled(void) "Interrupts disabled" 657megasas_mmio_readl(unsigned long addr, uint32_t val) "addr 0x%lx: 0x%x" 658megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx" 659megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" 660megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" 661 662# hw/milkymist-ac97.c 663milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 664milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 665milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" 666milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" 667milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" 668milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" 669milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" 670milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" 671milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" 672milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" 673 674# hw/milkymist-hpdmc.c 675milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" 676milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" 677 678# hw/milkymist-memcard.c 679milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 680milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 681 682# hw/milkymist-minimac2.c 683milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 684milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 685milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" 686milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" 687milkymist_minimac2_tx_frame(uint32_t length) "length %u" 688milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u" 689milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p" 690milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" 691milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" 692milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" 693milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" 694 695# hw/milkymist-pfpu.c 696milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 697milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 698milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" 699milkymist_pfpu_pulse_irq(void) "Pulse IRQ" 700 701# hw/milkymist-softusb.c 702milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 703milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 704milkymist_softusb_mevt(uint8_t m) "m %d" 705milkymist_softusb_kevt(uint8_t m) "m %d" 706milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x" 707milkymist_softusb_pulse_irq(void) "Pulse IRQ" 708 709# hw/milkymist-sysctl.c 710milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 711milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 712milkymist_sysctl_icap_write(uint32_t value) "value %08x" 713milkymist_sysctl_start_timer0(void) "Start timer0" 714milkymist_sysctl_stop_timer0(void) "Stop timer0" 715milkymist_sysctl_start_timer1(void) "Start timer1" 716milkymist_sysctl_stop_timer1(void) "Stop timer1" 717milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" 718milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" 719 720# hw/milkymist-tmu2.c 721milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 722milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 723milkymist_tmu2_start(void) "Start TMU" 724milkymist_tmu2_pulse_irq(void) "Pulse IRQ" 725 726# hw/milkymist-uart.c 727milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 728milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 729milkymist_uart_raise_irq(void) "Raise IRQ" 730milkymist_uart_lower_irq(void) "Lower IRQ" 731 732# hw/milkymist-vgafb.c 733milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 734milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 735 736# hw/mipsnet.c 737mipsnet_send(uint32_t size) "sending len=%u" 738mipsnet_receive(uint32_t size) "receiving len=%u" 739mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" 740mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 "" 741mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)" 742 743# hw/pc87312.c 744pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x" 745pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x" 746pc87312_info_floppy(uint32_t base) "base 0x%x" 747pc87312_info_ide(uint32_t base) "base 0x%x" 748pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u" 749pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u" 750 751# xen-all.c 752xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" 753xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i" 754 755# xen-mapcache.c 756xen_map_cache(uint64_t phys_addr) "want %#"PRIx64 757xen_remap_bucket(uint64_t index) "index %#"PRIx64 758xen_map_cache_return(void* ptr) "%p" 759xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64 760xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx" 761 762# exec.c 763qemu_put_ram_ptr(void* addr) "%p" 764 765# hw/xen_platform.c 766xen_platform_log(char *s) "xen platform: %s" 767 768# qemu-coroutine.c 769qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" 770qemu_coroutine_yield(void *from, void *to) "from %p to %p" 771qemu_coroutine_terminate(void *co) "self %p" 772 773# qemu-coroutine-lock.c 774qemu_co_queue_next_bh(void) "" 775qemu_co_queue_next(void *nxt) "next %p" 776qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" 777qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" 778qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" 779qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" 780 781# hw/escc.c 782escc_put_queue(char channel, int b) "channel %c put: 0x%02x" 783escc_get_queue(char channel, int val) "channel %c get 0x%02x" 784escc_update_irq(int irq) "IRQ = %d" 785escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" 786escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" 787escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" 788escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" 789escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" 790escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" 791escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" 792escc_sunkbd_event_out(int ch) "Translated keycode %2.2x" 793escc_kbd_command(int val) "Command %d" 794escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" 795 796# block/iscsi.c 797iscsi_aio_write16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" 798iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" 799iscsi_aio_read16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" 800iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" 801 802# hw/esp.c 803esp_error_fifo_overrun(void) "FIFO overrun" 804esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)" 805esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" 806esp_raise_irq(void) "Raise IRQ" 807esp_lower_irq(void) "Lower IRQ" 808esp_dma_enable(void) "Raise enable" 809esp_dma_disable(void) "Lower enable" 810esp_get_cmd(uint32_t dmalen, int target) "len %d target %d" 811esp_do_busid_cmd(uint8_t busid) "busid 0x%x" 812esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d" 813esp_write_response(uint32_t status) "Transfer status (status=%d)" 814esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d" 815esp_command_complete(void) "SCSI Command complete" 816esp_command_complete_unexpected(void) "SCSI command completed unexpectedly" 817esp_command_complete_fail(void) "Command failed" 818esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d" 819esp_handle_ti(uint32_t minlen) "Transfer Information len %d" 820esp_handle_ti_cmd(uint32_t cmdlen) "command len %d" 821esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x" 822esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x" 823esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)" 824esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)" 825esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)" 826esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)" 827esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)" 828esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)" 829esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)" 830esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)" 831esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)" 832esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)" 833esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)" 834esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)" 835esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)" 836esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)" 837esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction" 838esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)" 839esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)" 840esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" 841esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x" 842esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x" 843esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)" 844esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)" 845esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)" 846esp_pci_dma_start(uint32_t val) "START (%.8x)" 847esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x" 848esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x" 849 850# monitor.c 851handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\"" 852monitor_protocol_emitter(void *mon) "mon %p" 853monitor_protocol_event(uint32_t event, const char *evname, void *data) "event=%d name \"%s\" data %p" 854monitor_protocol_event_handler(uint32_t event, void *data, uint64_t last, uint64_t now) "event=%d data=%p last=%" PRId64 " now=%" PRId64 855monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p" 856monitor_protocol_event_queue(uint32_t event, void *data, uint64_t rate, uint64_t last, uint64_t now) "event=%d data=%p rate=%" PRId64 " last=%" PRId64 " now=%" PRId64 857monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64 858 859# hw/opencores_eth.c 860open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x" 861open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x" 862open_eth_update_irq(uint32_t v) "IRQ <- %x" 863open_eth_receive(unsigned len) "RX: len: %u" 864open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x" 865open_eth_receive_reject(void) "RX: rejected" 866open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x" 867open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u" 868open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x" 869open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x" 870open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x" 871open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x" 872 873# hw/9pfs/virtio-9p.c 874v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" 875v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" 876v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" 877v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s" 878v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64"" 879v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 880v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}" 881v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64"" 882v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}" 883v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d" 884v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p" 885v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d" 886v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" 887v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u" 888v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" 889v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d" 890v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 891v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u" 892v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd" 893v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u" 894v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd" 895v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d" 896v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd" 897v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d" 898v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" 899v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u" 900v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" 901v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d" 902v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s" 903v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 904v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}" 905v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d" 906v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" 907v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" 908v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d" 909v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" 910v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u" 911v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u" 912v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d" 913v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s" 914v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64"" 915v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d" 916v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 917v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s" 918 919# target-sparc/mmu_helper.c 920mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" 921mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" 922mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64"" 923mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64"" 924mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64"" 925mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" 926mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" 927mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64"" 928 929# target-sparc/int_helper.c 930int_helper_set_softint(uint32_t softint) "new %08x" 931int_helper_clear_softint(uint32_t softint) "new %08x" 932int_helper_write_softint(uint32_t softint) "new %08x" 933int_helper_icache_freeze(void) "Instruction cache: freeze" 934int_helper_dcache_freeze(void) "Data cache: freeze" 935 936# target-sparc/win_helper.c 937win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x" 938win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x" 939win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)" 940win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x" 941win_helper_done(uint32_t tl) "tl=%d" 942win_helper_retry(uint32_t tl) "tl=%d" 943 944# dma-helpers.c 945dma_bdrv_io(void *dbs, void *bs, int64_t sector_num, bool to_dev) "dbs=%p bs=%p sector_num=%" PRId64 " to_dev=%d" 946dma_aio_cancel(void *dbs) "dbs=%p" 947dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p" 948dma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d" 949dma_map_wait(void *dbs) "dbs=%p" 950 951# console.h 952displaysurface_free(void *display_state, void *display_surface) "state=%p surface=%p" 953displaysurface_resize(void *display_state, void *display_surface, int width, int height) "state=%p surface=%p %dx%d" 954 955# vga.c 956ppm_save(const char *filename, void *display_surface) "%s surface=%p" 957 958# savevm.c 959 960savevm_section_start(void) "" 961savevm_section_end(unsigned int section_id) "section_id %u" 962 963# arch_init.c 964migration_bitmap_sync_start(void) "" 965migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64"" 966 967# hw/qxl.c 968disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d" 969disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u" 970qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u" 971qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d" 972qxl_destroy_primary(int qid) "%d" 973qxl_enter_vga_mode(int qid) "%d" 974qxl_exit_vga_mode(int qid) "%d" 975qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64"" 976qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p" 977qxl_interface_attach_worker(int qid) "%d" 978qxl_interface_get_init_info(int qid) "%d" 979qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64 980qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]" 981qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d" 982qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d" 983qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d" 984qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s" 985qxl_io_log(int qid, const uint8_t *log_buf) "%d %s" 986qxl_io_read_unexpected(int qid) "%d" 987qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)" 988qxl_io_write(int qid, const char *mode, uint64_t addr, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " val=%"PRIu64" size=%u async=%d" 989qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64 990qxl_post_load(int qid, const char *mode) "%d %s" 991qxl_pre_load(int qid) "%d" 992qxl_pre_save(int qid) "%d" 993qxl_reset_surfaces(int qid) "%d" 994qxl_ring_command_check(int qid, const char *mode) "%d %s" 995qxl_ring_command_get(int qid, const char *mode) "%d %s" 996qxl_ring_command_req_notification(int qid) "%d" 997qxl_ring_cursor_check(int qid, const char *mode) "%d %s" 998qxl_ring_cursor_get(int qid, const char *mode) "%d %s" 999qxl_ring_cursor_req_notification(int qid) "%d" 1000qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s" 1001qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]" 1002qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d" 1003qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]" 1004qxl_soft_reset(int qid) "%d" 1005qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d" 1006qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u" 1007qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d" 1008qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d" 1009qemu_spice_wakeup(uint32_t qid) "%d" 1010qemu_spice_start(uint32_t qid) "%d" 1011qemu_spice_stop(uint32_t qid) "%d" 1012qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d" 1013qxl_spice_destroy_surfaces_complete(int qid) "%d" 1014qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d" 1015qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d" 1016qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d" 1017qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d" 1018qxl_spice_monitors_config(int qid) "%d" 1019qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d" 1020qxl_spice_oom(int qid) "%d" 1021qxl_spice_reset_cursor(int qid) "%d" 1022qxl_spice_reset_image_cache(int qid) "%d" 1023qxl_spice_reset_memslots(int qid) "%d" 1024qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]" 1025qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d" 1026qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d" 1027qxl_send_events(int qid, uint32_t events) "%d %d" 1028qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d" 1029qxl_set_guest_bug(int qid) "%d" 1030qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p" 1031qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p" 1032qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d" 1033qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u" 1034 1035# hw/qxl-render.c 1036qxl_render_blit_guest_primary_initialized(void) "" 1037qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]" 1038qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d" 1039qxl_render_update_area_done(void *cookie) "%p" 1040 1041# hw/spapr_pci.c 1042spapr_pci_msi(const char *msg, uint32_t n, uint32_t ca) "%s (device#%d, cfg=%x)" 1043spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64 1044spapr_pci_rtas_ibm_change_msi(unsigned func, unsigned req) "func %u, requested %u" 1045spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u" 1046spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u" 1047spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" 1048 1049# hw/xics.c 1050xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x" 1051xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32 1052xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32 1053xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq %#"PRIx32" priority %#x" 1054xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=%#x new pending priority=%#x" 1055xics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq %#x]" 1056xics_masked_pending(void) "set_irq_msi: masked pending" 1057xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq %#x]" 1058xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq %#x [src %d] server %#x prio %#x" 1059xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]" 1060xics_ics_eoi(int nr) "ics_eoi: irq %#x" 1061