194a420b1SStefan Hajnoczi# Trace events for debugging and performance instrumentation 294a420b1SStefan Hajnoczi# 394a420b1SStefan Hajnoczi# This file is processed by the tracetool script during the build. 494a420b1SStefan Hajnoczi# 594a420b1SStefan Hajnoczi# To add a new trace event: 694a420b1SStefan Hajnoczi# 794a420b1SStefan Hajnoczi# 1. Choose a name for the trace event. Declare its arguments and format 894a420b1SStefan Hajnoczi# string. 994a420b1SStefan Hajnoczi# 1094a420b1SStefan Hajnoczi# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> 1194a420b1SStefan Hajnoczi# trace_multiwrite_cb(). The source file must #include "trace.h". 1294a420b1SStefan Hajnoczi# 1394a420b1SStefan Hajnoczi# Format of a trace event: 1494a420b1SStefan Hajnoczi# 151e2cf2bcSStefan Hajnoczi# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" 1694a420b1SStefan Hajnoczi# 17a74cd8ccSFrediano Ziglio# Example: g_malloc(size_t size) "size %zu" 1894a420b1SStefan Hajnoczi# 191e2cf2bcSStefan Hajnoczi# The "disable" keyword will build without the trace event. 201e2cf2bcSStefan Hajnoczi# 2194a420b1SStefan Hajnoczi# The <name> must be a valid as a C function name. 2294a420b1SStefan Hajnoczi# 2394a420b1SStefan Hajnoczi# Types should be standard C types. Use void * for pointers because the trace 2494a420b1SStefan Hajnoczi# system may not have the necessary headers included. 2594a420b1SStefan Hajnoczi# 2694a420b1SStefan Hajnoczi# The <format-string> should be a sprintf()-compatible format string. 27cd245a19SStefan Hajnoczi 28cd245a19SStefan Hajnoczi# qemu-malloc.c 29a74cd8ccSFrediano Zigliog_malloc(size_t size, void *ptr) "size %zu ptr %p" 30a74cd8ccSFrediano Zigliog_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" 31a74cd8ccSFrediano Zigliog_free(void *ptr) "ptr %p" 32cd245a19SStefan Hajnoczi 33cd245a19SStefan Hajnoczi# osdep.c 3447f08d7aSLluísqemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" 3547f08d7aSLluísqemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" 3647f08d7aSLluísqemu_vfree(void *ptr) "ptr %p" 376d519a5fSStefan Hajnoczi 3864979a4dSStefan Hajnoczi# hw/virtio.c 3947f08d7aSLluísvirtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" 4047f08d7aSLluísvirtqueue_flush(void *vq, unsigned int count) "vq %p count %u" 4147f08d7aSLluísvirtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" 4247f08d7aSLluísvirtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" 4347f08d7aSLluísvirtio_irq(void *vq) "vq %p" 4447f08d7aSLluísvirtio_notify(void *vdev, void *vq) "vdev %p vq %p" 454e1837f8SStefan Hajnoczivirtio_set_status(void *vdev, uint8_t val) "vdev %p val %u" 4664979a4dSStefan Hajnoczi 4749e3fdd7SAmit Shah# hw/virtio-serial-bus.c 4847f08d7aSLluísvirtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" 4947f08d7aSLluísvirtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" 5047f08d7aSLluísvirtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" 5147f08d7aSLluísvirtio_serial_handle_control_message_port(unsigned int port) "port %u" 5249e3fdd7SAmit Shah 53d02e4fa4SAmit Shah# hw/virtio-console.c 5447f08d7aSLluísvirtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" 5547f08d7aSLluísvirtio_console_chr_read(unsigned int port, int size) "port %u, size %d" 5647f08d7aSLluísvirtio_console_chr_event(unsigned int port, int event) "port %u, event %d" 57d02e4fa4SAmit Shah 586d519a5fSStefan Hajnoczi# block.c 5928dcee10SStefan Hajnoczibdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\"" 6047f08d7aSLluísmultiwrite_cb(void *mcb, int ret) "mcb %p ret %d" 6147f08d7aSLluísbdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" 6247f08d7aSLluísbdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p" 6347f08d7aSLluísbdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d" 644265d620SPaolo Bonzinibdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 6547f08d7aSLluísbdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" 6647f08d7aSLluísbdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 6747f08d7aSLluísbdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 68025e849aSMarkus Armbrusterbdrv_lock_medium(void *bs, bool locked) "bs %p locked %d" 6947f08d7aSLluísbdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" 7047f08d7aSLluísbdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" 7159370aaaSStefan Hajnoczibdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p" 72ab185921SStefan Hajnoczibdrv_co_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d" 736d519a5fSStefan Hajnoczi 746d519a5fSStefan Hajnoczi# hw/virtio-blk.c 7547f08d7aSLluísvirtio_blk_req_complete(void *req, int status) "req %p status %d" 7647f08d7aSLluísvirtio_blk_rw_complete(void *req, int ret) "req %p ret %d" 7747f08d7aSLluísvirtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" 786d519a5fSStefan Hajnoczi 796d519a5fSStefan Hajnoczi# posix-aio-compat.c 8047f08d7aSLluíspaio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" 8147f08d7aSLluíspaio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" 8247f08d7aSLluíspaio_cancel(void *acb, void *opaque) "acb %p opaque %p" 83bd3c9aa5SPrerna Saxena 84bd3c9aa5SPrerna Saxena# ioport.c 8547f08d7aSLluíscpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" 8647f08d7aSLluíscpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" 8762dd89deSPrerna Saxena 8862dd89deSPrerna Saxena# balloon.c 8962dd89deSPrerna Saxena# Since requests are raised via monitor, not many tracepoints are needed. 9047f08d7aSLluísballoon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" 91d8023f31SBlue Swirl 92d8023f31SBlue Swirl# hw/apic.c 9347f08d7aSLluísapic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" 9447f08d7aSLluísapic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" 95689d7e2fSStefan Hajnoczicpu_set_apic_base(uint64_t val) "%016"PRIx64 96689d7e2fSStefan Hajnoczicpu_get_apic_base(uint64_t val) "%016"PRIx64 9747f08d7aSLluísapic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 9847f08d7aSLluísapic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 99d8023f31SBlue Swirl# coalescing 10047f08d7aSLluísapic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" 10147f08d7aSLluísapic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" 10247f08d7aSLluísapic_set_irq(int apic_irq_delivered) "coalescing %d" 10397bf4851SBlue Swirl 10497bf4851SBlue Swirl# hw/cs4231.c 10547f08d7aSLluíscs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" 10647f08d7aSLluíscs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" 10747f08d7aSLluíscs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" 10847f08d7aSLluíscs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" 10997bf4851SBlue Swirl 110d43ed9ecSHervé Poussineau# hw/ds1225y.c 11147f08d7aSLluísnvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" 11247f08d7aSLluísnvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" 113d43ed9ecSHervé Poussineau 11497bf4851SBlue Swirl# hw/eccmemctl.c 11547f08d7aSLluísecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" 11647f08d7aSLluísecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" 11747f08d7aSLluísecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" 11847f08d7aSLluísecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" 11947f08d7aSLluísecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" 12047f08d7aSLluísecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" 12147f08d7aSLluísecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" 12247f08d7aSLluísecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" 12347f08d7aSLluísecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" 12447f08d7aSLluísecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" 12547f08d7aSLluísecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" 12647f08d7aSLluísecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" 12747f08d7aSLluísecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" 12847f08d7aSLluísecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" 12947f08d7aSLluísecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" 13047f08d7aSLluísecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" 13147f08d7aSLluísecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" 13247f08d7aSLluísecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" 13397bf4851SBlue Swirl 13497bf4851SBlue Swirl# hw/lance.c 13547f08d7aSLluíslance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" 13647f08d7aSLluíslance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" 13797bf4851SBlue Swirl 13897bf4851SBlue Swirl# hw/slavio_intctl.c 13947f08d7aSLluísslavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" 14047f08d7aSLluísslavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" 14147f08d7aSLluísslavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" 14247f08d7aSLluísslavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" 14347f08d7aSLluísslavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" 14447f08d7aSLluísslavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" 14547f08d7aSLluísslavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" 14647f08d7aSLluísslavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" 14747f08d7aSLluísslavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" 14847f08d7aSLluísslavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" 14947f08d7aSLluísslavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" 15047f08d7aSLluísslavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" 15197bf4851SBlue Swirl 15297bf4851SBlue Swirl# hw/slavio_misc.c 15347f08d7aSLluísslavio_misc_update_irq_raise(void) "Raise IRQ" 15447f08d7aSLluísslavio_misc_update_irq_lower(void) "Lower IRQ" 15547f08d7aSLluísslavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" 15647f08d7aSLluísslavio_cfg_mem_writeb(uint32_t val) "Write config %02x" 15747f08d7aSLluísslavio_cfg_mem_readb(uint32_t ret) "Read config %02x" 15847f08d7aSLluísslavio_diag_mem_writeb(uint32_t val) "Write diag %02x" 15947f08d7aSLluísslavio_diag_mem_readb(uint32_t ret) "Read diag %02x" 16047f08d7aSLluísslavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" 16147f08d7aSLluísslavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" 16247f08d7aSLluísslavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" 16347f08d7aSLluísslavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" 16447f08d7aSLluísslavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" 16547f08d7aSLluísslavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" 16647f08d7aSLluísapc_mem_writeb(uint32_t val) "Write power management %02x" 16747f08d7aSLluísapc_mem_readb(uint32_t ret) "Read power management %02x" 16847f08d7aSLluísslavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" 16947f08d7aSLluísslavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" 17047f08d7aSLluísslavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" 17147f08d7aSLluísslavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" 17297bf4851SBlue Swirl 17397bf4851SBlue Swirl# hw/slavio_timer.c 17447f08d7aSLluísslavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" 17547f08d7aSLluísslavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" 176689d7e2fSStefan Hajnoczislavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64 17747f08d7aSLluísslavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" 17847f08d7aSLluísslavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" 179689d7e2fSStefan Hajnoczislavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64 18047f08d7aSLluísslavio_timer_mem_writel_counter_invalid(void) "not user timer" 18147f08d7aSLluísslavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" 18247f08d7aSLluísslavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" 18347f08d7aSLluísslavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" 18447f08d7aSLluísslavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" 18547f08d7aSLluísslavio_timer_mem_writel_mode_invalid(void) "not system timer" 186689d7e2fSStefan Hajnoczislavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64 18797bf4851SBlue Swirl 18897bf4851SBlue Swirl# hw/sparc32_dma.c 189689d7e2fSStefan Hajnocziledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64 190689d7e2fSStefan Hajnocziledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64 19147f08d7aSLluíssparc32_dma_set_irq_raise(void) "Raise IRQ" 19247f08d7aSLluíssparc32_dma_set_irq_lower(void) "Lower IRQ" 19347f08d7aSLluísespdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" 19447f08d7aSLluísespdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" 19547f08d7aSLluíssparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" 19647f08d7aSLluíssparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" 19747f08d7aSLluíssparc32_dma_enable_raise(void) "Raise DMA enable" 19847f08d7aSLluíssparc32_dma_enable_lower(void) "Lower DMA enable" 19997bf4851SBlue Swirl 20097bf4851SBlue Swirl# hw/sun4m.c 20147f08d7aSLluíssun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" 20247f08d7aSLluíssun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 20347f08d7aSLluíssun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" 20447f08d7aSLluíssun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" 20597bf4851SBlue Swirl 20697bf4851SBlue Swirl# hw/sun4m_iommu.c 20747f08d7aSLluíssun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" 20847f08d7aSLluíssun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" 209689d7e2fSStefan Hajnoczisun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64 21047f08d7aSLluíssun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" 21147f08d7aSLluíssun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" 21247f08d7aSLluíssun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" 21347f08d7aSLluíssun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" 214689d7e2fSStefan Hajnoczisun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64 21594b0b5ffSStefan Hajnoczi 216891fb2cdSGerd Hoffmann# hw/usb-bus.c 217891fb2cdSGerd Hoffmannusb_port_claim(int bus, const char *port) "bus %d, port %s" 218891fb2cdSGerd Hoffmannusb_port_attach(int bus, const char *port) "bus %d, port %s" 219891fb2cdSGerd Hoffmannusb_port_detach(int bus, const char *port) "bus %d, port %s" 220891fb2cdSGerd Hoffmannusb_port_release(int bus, const char *port) "bus %d, port %s" 221891fb2cdSGerd Hoffmann 222439a97ccSGerd Hoffmann# hw/usb-ehci.c 22347f08d7aSLluísusb_ehci_reset(void) "=== RESET ===" 22447f08d7aSLluísusb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" 22547f08d7aSLluísusb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x" 22647f08d7aSLluísusb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)" 22747f08d7aSLluísusb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" 22847f08d7aSLluísusb_ehci_state(const char *schedule, const char *state) "%s schedule %s" 22947f08d7aSLluísusb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x" 23047f08d7aSLluísusb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" 23147f08d7aSLluísusb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d" 23247f08d7aSLluísusb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x" 23347f08d7aSLluísusb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" 23447f08d7aSLluísusb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" 23547f08d7aSLluísusb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" 2362fe80192SGerd Hoffmannusb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d" 23747f08d7aSLluísusb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s" 23847f08d7aSLluísusb_ehci_port_detach(uint32_t port) "detach port #%d" 23947f08d7aSLluísusb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" 24047f08d7aSLluísusb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d" 24147f08d7aSLluísusb_ehci_queue_action(void *q, const char *action) "q %p: %s" 242439a97ccSGerd Hoffmann 24337fb59d3SGerd Hoffmann# hw/usb-desc.c 24447f08d7aSLluísusb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" 24547f08d7aSLluísusb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" 24647f08d7aSLluísusb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 24747f08d7aSLluísusb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 24847f08d7aSLluísusb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" 24947f08d7aSLluísusb_set_addr(int addr) "dev %d" 25047f08d7aSLluísusb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" 25147f08d7aSLluísusb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 25247f08d7aSLluísusb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 25337fb59d3SGerd Hoffmann 254e6a2f500SGerd Hoffmann# usb-linux.c 255e6a2f500SGerd Hoffmannusb_host_open_started(int bus, int addr) "dev %d:%d" 256e6a2f500SGerd Hoffmannusb_host_open_success(int bus, int addr) "dev %d:%d" 257e6a2f500SGerd Hoffmannusb_host_open_failure(int bus, int addr) "dev %d:%d" 258e6a2f500SGerd Hoffmannusb_host_disconnect(int bus, int addr) "dev %d:%d" 259e6a2f500SGerd Hoffmannusb_host_close(int bus, int addr) "dev %d:%d" 260e6a2f500SGerd Hoffmannusb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d" 261e6a2f500SGerd Hoffmannusb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d" 262e6a2f500SGerd Hoffmannusb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d" 263e6a2f500SGerd Hoffmannusb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d" 264e6a2f500SGerd Hoffmannusb_host_release_interfaces(int bus, int addr) "dev %d:%d" 265e6a2f500SGerd Hoffmannusb_host_req_control(int bus, int addr, int req, int value, int index) "dev %d:%d, req 0x%x, value %d, index %d" 266e6a2f500SGerd Hoffmannusb_host_req_data(int bus, int addr, int in, int ep, int size) "dev %d:%d, in %d, ep %d, size %d" 267e6a2f500SGerd Hoffmannusb_host_req_complete(int bus, int addr, int status) "dev %d:%d, status %d" 268e6a2f500SGerd Hoffmannusb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d" 269e6a2f500SGerd Hoffmannusb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d" 270e6a2f500SGerd Hoffmannusb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" 271e6a2f500SGerd Hoffmannusb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" 272e6a2f500SGerd Hoffmannusb_host_ep_start_iso(int bus, int addr, int ep) "dev %d:%d, ep %d" 273e6a2f500SGerd Hoffmannusb_host_ep_stop_iso(int bus, int addr, int ep) "dev %d:%d, ep %d" 274e6a2f500SGerd Hoffmannusb_host_reset(int bus, int addr) "dev %d:%d" 275e6a2f500SGerd Hoffmannusb_host_auto_scan_enabled(void) 276e6a2f500SGerd Hoffmannusb_host_auto_scan_disabled(void) 2779516bb47SGerd Hoffmannusb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d" 278e6a2f500SGerd Hoffmann 2795138efecSPaolo Bonzini# hw/scsi-bus.c 28047f08d7aSLluísscsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" 28147f08d7aSLluísscsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" 282e88c591dSPaolo Bonziniscsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" 28347f08d7aSLluísscsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" 28447f08d7aSLluísscsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" 28547f08d7aSLluísscsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" 286689d7e2fSStefan Hajnocziscsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64 28747f08d7aSLluísscsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" 28847f08d7aSLluísscsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" 28947f08d7aSLluísscsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" 29047f08d7aSLluísscsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x" 29147f08d7aSLluísscsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" 29247f08d7aSLluísscsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" 2935138efecSPaolo Bonzini 29494b0b5ffSStefan Hajnoczi# vl.c 29547f08d7aSLluísvm_state_notify(int running, int reason) "running %d reason %d" 296298800caSStefan Hajnoczi 297298800caSStefan Hajnoczi# block/qed-l2-cache.c 29847f08d7aSLluísqed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" 29947f08d7aSLluísqed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" 30047f08d7aSLluísqed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" 301298800caSStefan Hajnoczi 302298800caSStefan Hajnoczi# block/qed-table.c 30347f08d7aSLluísqed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" 30447f08d7aSLluísqed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" 30547f08d7aSLluísqed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" 30647f08d7aSLluísqed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" 307eabba580SStefan Hajnoczi 308eabba580SStefan Hajnoczi# block/qed.c 30947f08d7aSLluísqed_need_check_timer_cb(void *s) "s %p" 31047f08d7aSLluísqed_start_need_check_timer(void *s) "s %p" 31147f08d7aSLluísqed_cancel_need_check_timer(void *s) "s %p" 31247f08d7aSLluísqed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" 31347f08d7aSLluísqed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d" 314689d7e2fSStefan Hajnocziqed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64 31547f08d7aSLluísqed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 31647f08d7aSLluísqed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 317689d7e2fSStefan Hajnocziqed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 318689d7e2fSStefan Hajnocziqed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 31947f08d7aSLluísqed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 3200f3a4a01SFabien Chouteau 321b213b370SHervé Poussineau# hw/g364fb.c 32247f08d7aSLluísg364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" 32347f08d7aSLluísg364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" 324b213b370SHervé Poussineau 3250f3a4a01SFabien Chouteau# hw/grlib_gptimer.c 32647f08d7aSLluísgrlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" 32747f08d7aSLluísgrlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" 32847f08d7aSLluísgrlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" 32947f08d7aSLluísgrlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" 33047f08d7aSLluísgrlib_gptimer_hit(int id) "timer:%d HIT" 33147f08d7aSLluísgrlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" 33247f08d7aSLluísgrlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" 3333f10bcbbSFabien Chouteau 3343f10bcbbSFabien Chouteau# hw/grlib_irqmp.c 3352f4a725bSStefan Hajnoczigrlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x" 33647f08d7aSLluísgrlib_irqmp_ack(int intno) "interrupt:%d" 33747f08d7aSLluísgrlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" 338689d7e2fSStefan Hajnoczigrlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 33947f08d7aSLluísgrlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" 3408b1e1320SFabien Chouteau 3418b1e1320SFabien Chouteau# hw/grlib_apbuart.c 34247f08d7aSLluísgrlib_apbuart_event(int event) "event:%d" 34347f08d7aSLluísgrlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" 344b04d9890SFabien Chouteau 345b04d9890SFabien Chouteau# hw/leon3.c 34647f08d7aSLluísleon3_set_irq(int intno) "Set CPU IRQ %d" 34747f08d7aSLluísleon3_reset_irq(int intno) "Reset CPU IRQ %d" 3489363ee31SAnthony Liguori 349cbcc6336SAlon Levy# spice-qemu-char.c 35047f08d7aSLluísspice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" 35147f08d7aSLluísspice_vmc_read(int bytes, int len) "spice read %d of requested %d" 35247f08d7aSLluísspice_vmc_register_interface(void *scd) "spice vmc registered interface %p" 35347f08d7aSLluísspice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" 3544ef66fa7SMichael Walle 3554ef66fa7SMichael Walle# hw/lm32_pic.c 35647f08d7aSLluíslm32_pic_raise_irq(void) "Raise CPU interrupt" 35747f08d7aSLluíslm32_pic_lower_irq(void) "Lower CPU interrupt" 35847f08d7aSLluíslm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" 35947f08d7aSLluíslm32_pic_set_im(uint32_t im) "im 0x%08x" 36047f08d7aSLluíslm32_pic_set_ip(uint32_t ip) "ip 0x%08x" 36147f08d7aSLluíslm32_pic_get_im(uint32_t im) "im 0x%08x" 36247f08d7aSLluíslm32_pic_get_ip(uint32_t ip) "ip 0x%08x" 36315d7dc4fSMichael Walle 36415d7dc4fSMichael Walle# hw/lm32_juart.c 36547f08d7aSLluíslm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" 36647f08d7aSLluíslm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" 36747f08d7aSLluíslm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" 36847f08d7aSLluíslm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" 369ea7924dcSMichael Walle 370ea7924dcSMichael Walle# hw/lm32_timer.c 37147f08d7aSLluíslm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 37247f08d7aSLluíslm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 37347f08d7aSLluíslm32_timer_hit(void) "timer hit" 37447f08d7aSLluíslm32_timer_irq_state(int level) "irq state %d" 375770ae571SMichael Walle 376770ae571SMichael Walle# hw/lm32_uart.c 37747f08d7aSLluíslm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 37847f08d7aSLluíslm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 37947f08d7aSLluíslm32_uart_irq_state(int level) "irq state %d" 380f19410caSMichael Walle 381f19410caSMichael Walle# hw/lm32_sys.c 38247f08d7aSLluíslm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 38325a8bb96SMichael Walle 38425a8bb96SMichael Walle# hw/milkymist-ac97.c 38547f08d7aSLluísmilkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 38647f08d7aSLluísmilkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 38747f08d7aSLluísmilkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" 38847f08d7aSLluísmilkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" 38947f08d7aSLluísmilkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" 39047f08d7aSLluísmilkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" 39147f08d7aSLluísmilkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" 39247f08d7aSLluísmilkymist_ac97_in_cb_transferred(int transferred) "transferred %d" 39347f08d7aSLluísmilkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" 39447f08d7aSLluísmilkymist_ac97_out_cb_transferred(int transferred) "transferred %d" 395e4dc6d2cSMichael Walle 396e4dc6d2cSMichael Walle# hw/milkymist-hpdmc.c 39747f08d7aSLluísmilkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" 39847f08d7aSLluísmilkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" 399b4e37d98SMichael Walle 400b4e37d98SMichael Walle# hw/milkymist-memcard.c 40147f08d7aSLluísmilkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 40247f08d7aSLluísmilkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 40307424544SMichael Walle 40457aa265dSMichael Walle# hw/milkymist-minimac2.c 40547f08d7aSLluísmilkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 40647f08d7aSLluísmilkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 40747f08d7aSLluísmilkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" 40847f08d7aSLluísmilkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" 40947f08d7aSLluísmilkymist_minimac2_tx_frame(uint32_t length) "length %u" 41047f08d7aSLluísmilkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u" 41147f08d7aSLluísmilkymist_minimac2_drop_rx_frame(const void *buf) "buf %p" 41247f08d7aSLluísmilkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" 41347f08d7aSLluísmilkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" 41447f08d7aSLluísmilkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" 41547f08d7aSLluísmilkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" 4165ee18b9cSMichael Walle 4175ee18b9cSMichael Walle# hw/milkymist-pfpu.c 41847f08d7aSLluísmilkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 41947f08d7aSLluísmilkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 42047f08d7aSLluísmilkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" 42147f08d7aSLluísmilkymist_pfpu_pulse_irq(void) "Pulse IRQ" 42287a381ecSMichael Walle 42387a381ecSMichael Walle# hw/milkymist-softusb.c 42447f08d7aSLluísmilkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 42547f08d7aSLluísmilkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 42647f08d7aSLluísmilkymist_softusb_mevt(uint8_t m) "m %d" 42747f08d7aSLluísmilkymist_softusb_kevt(uint8_t m) "m %d" 42847f08d7aSLluísmilkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x" 42947f08d7aSLluísmilkymist_softusb_pulse_irq(void) "Pulse IRQ" 43096832424SMichael Walle 43196832424SMichael Walle# hw/milkymist-sysctl.c 43247f08d7aSLluísmilkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 43347f08d7aSLluísmilkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 43447f08d7aSLluísmilkymist_sysctl_icap_write(uint32_t value) "value %08x" 43547f08d7aSLluísmilkymist_sysctl_start_timer0(void) "Start timer0" 43647f08d7aSLluísmilkymist_sysctl_stop_timer0(void) "Stop timer0" 43747f08d7aSLluísmilkymist_sysctl_start_timer1(void) "Start timer1" 43847f08d7aSLluísmilkymist_sysctl_stop_timer1(void) "Stop timer1" 43947f08d7aSLluísmilkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" 44047f08d7aSLluísmilkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" 4410670daddSMichael Walle 4420670daddSMichael Walle# hw/milkymist-tmu2.c 44347f08d7aSLluísmilkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 44447f08d7aSLluísmilkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 44547f08d7aSLluísmilkymist_tmu2_start(void) "Start TMU" 44647f08d7aSLluísmilkymist_tmu2_pulse_irq(void) "Pulse IRQ" 447883de16bSMichael Walle 448883de16bSMichael Walle# hw/milkymist-uart.c 44947f08d7aSLluísmilkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 45047f08d7aSLluísmilkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 451fcfa3397SMichael Wallemilkymist_uart_raise_irq(void) "Raise IRQ" 452fcfa3397SMichael Wallemilkymist_uart_lower_irq(void) "Lower IRQ" 453d23948b1SMichael Walle 454d23948b1SMichael Walle# hw/milkymist-vgafb.c 45547f08d7aSLluísmilkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 45647f08d7aSLluísmilkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 457432d268cSJun Nakajima 45883818f7cSHervé Poussineau# hw/mipsnet.c 45983818f7cSHervé Poussineaumipsnet_send(uint32_t size) "sending len=%u" 46083818f7cSHervé Poussineaumipsnet_receive(uint32_t size) "receiving len=%u" 46183818f7cSHervé Poussineaumipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" 462903ec8eaSPaolo Bonzinimipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 "" 46383818f7cSHervé Poussineaumipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)" 46483818f7cSHervé Poussineau 465432d268cSJun Nakajima# xen-all.c 46647f08d7aSLluísxen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" 46747f08d7aSLluísxen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i" 468432d268cSJun Nakajima 469432d268cSJun Nakajima# xen-mapcache.c 470689d7e2fSStefan Hajnoczixen_map_cache(uint64_t phys_addr) "want %#"PRIx64 471689d7e2fSStefan Hajnoczixen_remap_bucket(uint64_t index) "index %#"PRIx64 47247f08d7aSLluísxen_map_cache_return(void* ptr) "%p" 473689d7e2fSStefan Hajnoczixen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64 47447f08d7aSLluísxen_unmap_block(void* addr, unsigned long size) "%p, size %#lx" 475050a0ddfSAnthony PERARD 476050a0ddfSAnthony PERARD# exec.c 47747f08d7aSLluísqemu_put_ram_ptr(void* addr) "%p" 47801195b73SSteven Smith 47901195b73SSteven Smith# hw/xen_platform.c 48047f08d7aSLluísxen_platform_log(char *s) "xen platform: %s" 48100dccaf1SKevin Wolf 48200dccaf1SKevin Wolf# qemu-coroutine.c 48347f08d7aSLluísqemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" 48447f08d7aSLluísqemu_coroutine_yield(void *from, void *to) "from %p to %p" 48547f08d7aSLluísqemu_coroutine_terminate(void *co) "self %p" 486b96e9247SKevin Wolf 487b96e9247SKevin Wolf# qemu-coroutine-lock.c 48847f08d7aSLluísqemu_co_queue_next_bh(void) "" 48947f08d7aSLluísqemu_co_queue_next(void *next) "next %p" 49047f08d7aSLluísqemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" 49147f08d7aSLluísqemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" 49247f08d7aSLluísqemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" 49347f08d7aSLluísqemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" 49430c2f238SBlue Swirl 49530c2f238SBlue Swirl# hw/escc.c 49647f08d7aSLluísescc_put_queue(char channel, int b) "channel %c put: 0x%02x" 49747f08d7aSLluísescc_get_queue(char channel, int val) "channel %c get 0x%02x" 49847f08d7aSLluísescc_update_irq(int irq) "IRQ = %d" 49947f08d7aSLluísescc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" 50047f08d7aSLluísescc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" 50147f08d7aSLluísescc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" 50247f08d7aSLluísescc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" 50347f08d7aSLluísescc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" 50447f08d7aSLluísescc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" 50547f08d7aSLluísescc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" 50647f08d7aSLluísescc_sunkbd_event_out(int ch) "Translated keycode %2.2x" 50747f08d7aSLluísescc_kbd_command(int val) "Command %d" 50847f08d7aSLluísescc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" 509bf4b9889SBlue Swirl 510c589b249SRonnie Sahlberg# block/iscsi.c 511c589b249SRonnie Sahlbergiscsi_aio_write10_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" 512c589b249SRonnie Sahlbergiscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" 513c589b249SRonnie Sahlbergiscsi_aio_read10_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" 514c589b249SRonnie Sahlbergiscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" 515c589b249SRonnie Sahlberg 516bf4b9889SBlue Swirl# hw/esp.c 517bf4b9889SBlue Swirlesp_raise_irq(void) "Raise IRQ" 518bf4b9889SBlue Swirlesp_lower_irq(void) "Lower IRQ" 519bf4b9889SBlue Swirlesp_dma_enable(void) "Raise enable" 520bf4b9889SBlue Swirlesp_dma_disable(void) "Lower enable" 521bf4b9889SBlue Swirlesp_get_cmd(uint32_t dmalen, int target) "len %d target %d" 522bf4b9889SBlue Swirlesp_do_busid_cmd(uint8_t busid) "busid 0x%x" 523bf4b9889SBlue Swirlesp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d" 524bf4b9889SBlue Swirlesp_write_response(uint32_t status) "Transfer status (status=%d)" 525bf4b9889SBlue Swirlesp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d" 526bf4b9889SBlue Swirlesp_command_complete(void) "SCSI Command complete" 527bf4b9889SBlue Swirlesp_command_complete_unexpected(void) "SCSI command completed unexpectedly" 528bf4b9889SBlue Swirlesp_command_complete_fail(void) "Command failed" 529bf4b9889SBlue Swirlesp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d" 530bf4b9889SBlue Swirlesp_handle_ti(uint32_t minlen) "Transfer Information len %d" 531bf4b9889SBlue Swirlesp_handle_ti_cmd(uint32_t cmdlen) "command len %d" 532bf4b9889SBlue Swirlesp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x" 533bf4b9889SBlue Swirlesp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x" 534bf4b9889SBlue Swirlesp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)" 535bf4b9889SBlue Swirlesp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)" 536bf4b9889SBlue Swirlesp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)" 537bf4b9889SBlue Swirlesp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)" 538bf4b9889SBlue Swirlesp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)" 539bf4b9889SBlue Swirlesp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)" 540bf4b9889SBlue Swirlesp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)" 541bf4b9889SBlue Swirlesp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)" 542bf4b9889SBlue Swirlesp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)" 543bf4b9889SBlue Swirlesp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)" 544bf4b9889SBlue Swirlesp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)" 545bf4b9889SBlue Swirlesp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)" 54689bd820aSStefan Hajnoczi 54789bd820aSStefan Hajnoczi# monitor.c 54889bd820aSStefan Hajnoczihandle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\"" 54989bd820aSStefan Hajnoczimonitor_protocol_emitter(void *mon) "mon %p" 550342407fdSMax Filippov 551342407fdSMax Filippov# hw/opencores_eth.c 552342407fdSMax Filippovopen_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x" 553342407fdSMax Filippovopen_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x" 554342407fdSMax Filippovopen_eth_update_irq(uint32_t v) "IRQ <- %x" 555342407fdSMax Filippovopen_eth_receive(unsigned len) "RX: len: %u" 556342407fdSMax Filippovopen_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x" 557342407fdSMax Filippovopen_eth_receive_reject(void) "RX: rejected" 558342407fdSMax Filippovopen_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x" 559342407fdSMax Filippovopen_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u" 560342407fdSMax Filippovopen_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x" 561342407fdSMax Filippovopen_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x" 562342407fdSMax Filippovopen_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x" 563342407fdSMax Filippovopen_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x" 5641f99b949SAnthony Liguori 565c572f23aSHarsh Prateek Bora# hw/9pfs/virtio-9p.c 5667999f7e1SAneesh Kumar K.Vv9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" 567c572f23aSHarsh Prateek Borav9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" 568c572f23aSHarsh Prateek Borav9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" 569c76eaf13SStefan Weilv9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s" 570c572f23aSHarsh Prateek Borav9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64"" 571c572f23aSHarsh Prateek Borav9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 572c572f23aSHarsh Prateek Borav9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}" 573c572f23aSHarsh Prateek Borav9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64"" 574c572f23aSHarsh Prateek Borav9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}" 575c572f23aSHarsh Prateek Borav9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d" 576c572f23aSHarsh Prateek Borav9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p" 577c572f23aSHarsh Prateek Borav9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d" 578c572f23aSHarsh Prateek Borav9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" 579c572f23aSHarsh Prateek Borav9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u" 580c572f23aSHarsh Prateek Borav9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" 581c572f23aSHarsh Prateek Borav9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d" 582c572f23aSHarsh Prateek Borav9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 583c572f23aSHarsh Prateek Borav9fs_read(uint16_t tag, uint8_t id, int32_t fid, int64_t off, int32_t max_count) "tag %d id %d fid %d off %"PRId64" max_count %d" 584c572f23aSHarsh Prateek Borav9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd" 585c572f23aSHarsh Prateek Borav9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, int64_t offset, int32_t max_count) "tag %d id %d fid %d offset %"PRId64" max_count %d" 586c572f23aSHarsh Prateek Borav9fs_readdir_return(uint16_t tag, uint8_t id, int32_t count, ssize_t retval) "tag %d id %d count %d retval %zd" 587c572f23aSHarsh Prateek Borav9fs_write(uint16_t tag, uint8_t id, int32_t fid, int64_t off, int32_t count, int cnt) "tag %d id %d fid %d off %"PRId64" count %d cnt %d" 588c572f23aSHarsh Prateek Borav9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd" 589c572f23aSHarsh Prateek Borav9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d" 590c572f23aSHarsh Prateek Borav9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" 591c572f23aSHarsh Prateek Borav9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u" 592c572f23aSHarsh Prateek Borav9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" 593c572f23aSHarsh Prateek Borav9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d" 594c572f23aSHarsh Prateek Borav9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s" 595c572f23aSHarsh Prateek Borav9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 596c76eaf13SStefan Weilv9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}" 597c572f23aSHarsh Prateek Borav9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d" 598c572f23aSHarsh Prateek Borav9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" 599c572f23aSHarsh Prateek Borav9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" 600c572f23aSHarsh Prateek Borav9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d" 601c572f23aSHarsh Prateek Borav9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" 602c572f23aSHarsh Prateek Borav9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u" 603c76eaf13SStefan Weilv9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u" 604c76eaf13SStefan Weilv9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d" 605c572f23aSHarsh Prateek Borav9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s" 606c572f23aSHarsh Prateek Borav9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64"" 607c572f23aSHarsh Prateek Borav9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d" 608c572f23aSHarsh Prateek Borav9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 609c572f23aSHarsh Prateek Borav9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s" 610ec0ceb17SBlue Swirl 611ec0ceb17SBlue Swirl# target-sparc/mmu_helper.c 612ec0ceb17SBlue Swirlmmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" 613ec0ceb17SBlue Swirlmmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" 614ec0ceb17SBlue Swirlmmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64"" 615ec0ceb17SBlue Swirlmmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64"" 616ec0ceb17SBlue Swirlmmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64"" 617ec0ceb17SBlue Swirlmmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" 618ec0ceb17SBlue Swirlmmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" 619ec0ceb17SBlue Swirlmmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64"" 62011e66bcaSBlue Swirl 62111e66bcaSBlue Swirl# target-sparc/int_helper.c 62211e66bcaSBlue Swirlint_helper_set_softint(uint32_t softint) "new %08x" 62311e66bcaSBlue Swirlint_helper_clear_softint(uint32_t softint) "new %08x" 62411e66bcaSBlue Swirlint_helper_write_softint(uint32_t softint) "new %08x" 62511e66bcaSBlue Swirlint_helper_icache_freeze(void) "Instruction cache: freeze" 62611e66bcaSBlue Swirlint_helper_dcache_freeze(void) "Data cache: freeze" 627870be6adSBlue Swirl 628870be6adSBlue Swirl# target-sparc/win_helper.c 629870be6adSBlue Swirlwin_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x" 630870be6adSBlue Swirlwin_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x" 631870be6adSBlue Swirlwin_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)" 632870be6adSBlue Swirlwin_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x" 633870be6adSBlue Swirlwin_helper_done(uint32_t tl) "tl=%d" 634870be6adSBlue Swirlwin_helper_retry(uint32_t tl) "tl=%d" 635*c57c4658SKevin Wolf 636*c57c4658SKevin Wolf# dma-helpers.c 637*c57c4658SKevin Wolfdma_bdrv_io(void *dbs, void *bs, int64_t sector_num, bool to_dev) "dbs=%p bs=%p sector_num=%" PRId64 " to_dev=%d" 638*c57c4658SKevin Wolfdma_aio_cancel(void *dbs) "dbs=%p" 639*c57c4658SKevin Wolfdma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p" 640*c57c4658SKevin Wolfdma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d" 641*c57c4658SKevin Wolfdma_map_wait(void *dbs) "dbs=%p" 642