xref: /openbmc/qemu/tests/tcg/xtensa/test_timer.S (revision d6032e06)
1#include "macros.inc"
2
3test_suite timer
4
5test ccount
6    rsr     a3, ccount
7    rsr     a4, ccount
8    sub     a3, a4, a3
9    assert  eqi, a3, 1
10test_end
11
12test ccompare
13    movi    a2, 0
14    wsr     a2, intenable
15    rsr     a2, interrupt
16    wsr     a2, intclear
17    movi    a2, 0
18    wsr     a2, ccompare1
19    wsr     a2, ccompare2
20
21    movi    a3, 20
22    rsr     a2, ccount
23    addi    a2, a2, 20
24    wsr     a2, ccompare0
25    rsr     a2, interrupt
26    assert  eqi, a2, 0
27    loop    a3, 1f
28    rsr     a3, interrupt
29    bnez    a3, 2f
301:
31    test_fail
322:
33test_end
34
35test ccompare0_interrupt
36    set_vector kernel, 2f
37    movi    a2, 0
38    wsr     a2, intenable
39    rsr     a2, interrupt
40    wsr     a2, intclear
41    movi    a2, 0
42    wsr     a2, ccompare1
43    wsr     a2, ccompare2
44
45    movi    a3, 20
46    rsr     a2, ccount
47    addi    a2, a2, 20
48    wsr     a2, ccompare0
49    rsync
50    rsr     a2, interrupt
51    assert  eqi, a2, 0
52
53    movi    a2, 0x40
54    wsr     a2, intenable
55    rsil    a2, 0
56    loop    a3, 1f
57    nop
581:
59    test_fail
602:
61    rsr     a2, exccause
62    assert  eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
63test_end
64
65test ccompare1_interrupt
66    set_vector level3, 2f
67    movi    a2, 0
68    wsr     a2, intenable
69    rsr     a2, interrupt
70    wsr     a2, intclear
71    movi    a2, 0
72    wsr     a2, ccompare0
73    wsr     a2, ccompare2
74
75    movi    a3, 20
76    rsr     a2, ccount
77    addi    a2, a2, 20
78    wsr     a2, ccompare1
79    rsync
80    rsr     a2, interrupt
81    assert  eqi, a2, 0
82    movi    a2, 0x400
83    wsr     a2, intenable
84    rsil    a2, 2
85    loop    a3, 1f
86    nop
871:
88    test_fail
892:
90test_end
91
92test ccompare2_interrupt
93    set_vector level5, 2f
94    movi    a2, 0
95    wsr     a2, intenable
96    rsr     a2, interrupt
97    wsr     a2, intclear
98    movi    a2, 0
99    wsr     a2, ccompare0
100    wsr     a2, ccompare1
101
102    movi    a3, 20
103    rsr     a2, ccount
104    addi    a2, a2, 20
105    wsr     a2, ccompare2
106    rsync
107    rsr     a2, interrupt
108    assert  eqi, a2, 0
109    movi    a2, 0x2000
110    wsr     a2, intenable
111    rsil    a2, 4
112    loop    a3, 1f
113    nop
1141:
115    test_fail
1162:
117test_end
118
119test ccompare_interrupt_masked
120    set_vector kernel, 2f
121    movi    a2, 0
122    wsr     a2, intenable
123    rsr     a2, interrupt
124    wsr     a2, intclear
125    movi    a2, 0
126    wsr     a2, ccompare2
127
128    movi    a3, 40
129    rsr     a2, ccount
130    addi    a2, a2, 20
131    wsr     a2, ccompare1
132    addi    a2, a2, 20
133    wsr     a2, ccompare0
134    rsync
135    rsr     a2, interrupt
136    assert  eqi, a2, 0
137
138    movi    a2, 0x40
139    wsr     a2, intenable
140    rsil    a2, 0
141    loop    a3, 1f
142    nop
1431:
144    test_fail
1452:
146    rsr     a2, exccause
147    assert  eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
148test_end
149
150test ccompare_interrupt_masked_waiti
151    set_vector kernel, 2f
152    movi    a2, 0
153    wsr     a2, intenable
154    rsr     a2, interrupt
155    wsr     a2, intclear
156    movi    a2, 0
157    wsr     a2, ccompare2
158
159    movi    a3, 40
160    rsr     a2, ccount
161    addi    a2, a2, 20
162    wsr     a2, ccompare1
163    addi    a2, a2, 20
164    wsr     a2, ccompare0
165    rsync
166    rsr     a2, interrupt
167    assert  eqi, a2, 0
168
169    movi    a2, 0x40
170    wsr     a2, intenable
171    waiti   0
172    test_fail
1732:
174    rsr     a2, exccause
175    assert  eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
176test_end
177
178test_suite_end
179